Samuel A. Falvo II 764f849170 Merge pull request #27 from olofk/bootrom_fix
Make boot ROM contents configurable through top-level parameter
2016-12-12 22:18:43 -08:00
2016-12-12 22:14:21 -08:00
2016-06-18 13:15:30 -04:00
2016-12-11 21:35:10 -08:00

The KCP53000 Core Family (formerly Polaris)

Polaris used to be the name of a simple, 64-bit RISC-V ISA CPU. However, before I could actually complete the project, I discovered that AMD had a line of GPUs by that name.

So, I've decided to rename the Polaris CPU to something deliberately not trademarkable: KCP53000. In so doing, I've also decided that there ought to be a family of useful modules built to work with this CPU. Just as one considers the "m68K" a complete family of products built around the Motorola 68000 (and later, CPU32) ISA, so too should people regard the KCP53000 as the first member of a family of KCP53K ("53K") cores.

The following cores exist so far in this repository:

ID Subdirectory Description Datasheet?
KCP53000 processor 64-bit processor built on the RISC-V 64-bit integer instruction set. Yes
KCP53001 arbiter 64-bit Furcula interconnect arbiter. Not yet (note 1)
KCP53002 wb-bridge 64-bit Wishbone interconnect bridge. Not yet (note 1)
KCP53003 bottleneck 64-bit to 16-bit Furcula bridge. Not yet

Notes

  1. A prototype of these cores are documented in the Example Application chapter of the KCP53000's datasheet.
Description
RISC-V RV64IS-compatible processor for the Kestrel-3
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