Martin Kroeker
4001d7a74f
Increase LA464/16MB DGEMM_R for minimal spacing of 64 to MAX(p,q)
2026-01-17 20:53:51 +01:00
Martin Kroeker
2d46f1ec65
Merge branch 'develop' into issue5414
2026-01-09 15:04:06 +01:00
Zhiqing xie
6939a43c3b
Support for SME1 based ssyr2k_direct kernel for cblas_ssyr2k level 3 API
2026-01-08 11:09:04 +08:00
Martin Kroeker
c3c857c95e
fix sequence
2025-11-24 22:38:49 +01:00
Martin Kroeker
ea85b6696f
Merge branch 'OpenMathLib:develop' into issue5414
2025-11-23 10:14:07 +01:00
Martin Kroeker
f2d010de12
Merge pull request #5512 from quic/topic/ssyrk_direct_sme1
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Support for SME1 based ssyrk_direct kernel for cblas_ssyrk level 3 API
2025-11-06 14:06:43 -08:00
changjua
43d38d336f
Support for SME1 based ssyrk_direct kernel for cblas_ssyrk level 3 API
2025-10-20 11:35:20 +08:00
Martin Kroeker
9bfc3612f9
Merge branch 'OpenMathLib:develop' into issue5414
2025-10-12 09:18:06 -07:00
Martin Kroeker
e40714cabd
Merge pull request #5450 from quic/topic/strmm_direct_sme1
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Support for SME1 based strmm_direct kernel for cblas_strmm level 3 API
2025-10-11 15:20:19 -07:00
changjua
644ea07ef9
Support for SME1 based strmm_direct kernel for cblas_strmm level 3 API
2025-10-10 10:48:27 +08:00
Martin Kroeker
20f5ed1a94
Merge branch 'OpenMathLib:develop' into issue5414
2025-10-08 05:27:28 -07:00
Chris Sidebottom
37fc3bbca0
Add Infrastructure for SHGEMV
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This adds all the relevant bits and pieces to add a `shgemv` path as
well as a future `hgemm`/`hgemv` path in a similar model to `sb` and `b`
interfaces.
I've also fixed a few bits and pieces around `shgemm` which didn't build
in a few situations.
2025-10-07 15:03:24 +00:00
Martin Kroeker
fc516af155
Merge branch 'develop' into issue5414
2025-10-01 14:12:59 -07:00
Rajendra Prasad Matcha
19268471cc
Support for SME1 based ssymm_direct kernel for cblas_ssymm level 3 API
2025-09-30 15:05:33 +05:30
Martin Kroeker
0203657f40
Add sgemm_direct_performant for ARM64
2025-08-18 01:42:32 -07:00
Martin Kroeker
39c90f9859
Merge pull request #5380 from quic/topic/sgemm_direct_sme1_alpha_beta
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SME1 based direct kernel (with alpha and beta) for cblas_sgemm level 3
2025-07-18 23:23:39 +02:00
Rajendra Prasad Matcha
eae0abfdb6
SME1 based direct kernel with alpha and beta for cblas_sgemm level 3 API.
2025-07-17 16:14:31 +05:30
Chris Sidebottom
e105411460
Add infrastructure for bgemv/bscal
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- Sets up all the various entrypoints for `bgemv`
- Adds `bscal` for use in the `bgemv` interface
- Adds test cases for comparing `sgemv` and `bgemv`
- Adds generic kernels for `bgemv_n` and `bgemv_t` which are accurate
enough to pass above tests
2025-07-15 14:48:57 +01:00
Chris Sidebottom
740efd71c4
Add optimized BGEMM kernel for NEOVERSEV1 target
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This also improves the testing and generic kernel by re-using the BF16
conversion functions.
Built on top of https://github.com/OpenMathLib/OpenBLAS/pull/5357 and derived from https://github.com/OpenMathLib/OpenBLAS/pull/5287
Co-authored-by: Ye Tao <ye.tao@arm.com >
2025-07-10 23:23:27 +00:00
Martin Kroeker
343830c26f
Add BGEMM parameter tables
2025-07-10 14:59:46 +02:00
Chris Sidebottom
f95e7b0e32
Add infrastructure for BGEMM
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Setting up all the infrastructure for BGEMM support in OpenBLAS, hopefully I found all the right places.
Derived mostly from the previous work done in https://github.com/OpenMathLib/OpenBLAS/pull/5287
Co-authored-by: Ye Tao <ye.tao@arm.com >
2025-07-08 16:22:41 +01:00
gkdddd
670ec6f757
Added shgemm_kernel_8x8 for RISCV64_ZVL128B and shgemm_kernel_16x8 for RISCV64_ZVL256B
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Added HFLOAT16 support for RISCV64
Added shgemm_kernel_8x8 for RISCV64_ZVL128B and shgemm_kernel_16x8 for RISCV64_ZVL256B based on HFLOAT16
The instruction sets used are ZVFH and ZFH, which need to be supported by RVV1.0
Related to issue #5279
Co-authored-by Linjin Li <linjin_li@163.com >
2025-06-03 20:14:30 +08:00
Martin Kroeker
5141a90993
Fix ARMV9SME target in DYNAMIC_ARCH and add SME query code for MacOS ( #5222 )
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* Fix ARMV9SME target and add support_sme1 code for MacOS
* make sgemm_direct unconditionally available on all arm64
* build a (dummy) sgemm_direct kernel on all arm64
* Update dynamic_arm64.c
2025-05-10 22:39:32 +02:00
Vaisakh K V
f66ca05b31
Merge branch 'develop' into topic/sgemm_direct_sme1
2025-02-13 14:54:37 +05:30
Vaisakh K V
d23eb3b93e
Support for SME1 based sgemm_direct kernel for cblas_sgemm level 3 API
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* Added ARMV9SME target
* Added SGEMM_DIRECT kernel based on SME1
2025-02-13 14:51:21 +05:30
Martin Kroeker
4924319c50
fix position of srotm, qrotm
2025-01-22 16:07:35 +01:00
tingbo.liao
3c8df6358f
Further rearranged the rotm kernel for the different architectures.
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Signed-off-by: tingbo.liao <tingbo.liao@starfivetech.com >
2025-01-22 11:41:12 +08:00
gxw
48698b2b1d
LoongArch64: Rename core
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Use microarchitecture name instead of meaningless strings to name the core,
the legacy core is still retained.
1. Rename LOONGSONGENERIC to LA64_GENERIC
2. Rename LOONGSON3R5 to LA464
3. Rename LOONGSON2K1000 to LA264
2024-09-29 09:35:21 +08:00
Mark Ryan
3b715e6162
Add autodetection for riscv64
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Implement DYNAMIC_ARCH support for riscv64. Three cpu types are
supported, riscv64_generic, riscv64_zvl256b, riscv64_zvl128b.
The two non-generic kernels require CPU support for RVV 1.0 to
function correctly. Detecting that a riscv64 device supports
RVV 1.0 is a little complicated as there are some boards on the
market that advertise support for V via hwcap but only support
RVV 0.7.1, which is not binary compatible with RVV 1.0. The
approach taken is to first try hwprobe. If hwprobe is not
available, we fall back to hwcap + an additional check to distinguish
between RVV 1.0 and RVV 0.7.1.
Tested on a VM with VLEN=256, a CanMV K230 with VLEN=128 (with only
the big core enabled), a Lichee Pi with RVV 0.7.1 and a VF2 with no
vector.
A compiler with RVV 1.0 support must be used to build OpenBLAS for
riscv64 when DYNAMIC_ARCH=1.
Signed-off-by: Mark Ryan <markdryan@rivosinc.com >
2024-07-15 14:24:22 +00:00
Martin Kroeker
93d975d8fd
Merge pull request #4593 from XiWeiGu/loongarch_add_buffer_offset
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loongarch: Optimizing the performance of the GEMM on servers
2024-04-10 14:23:31 +02:00
gxw
d8c4ea8793
loongarch: Optimizing the performance of the GEMM on servers
2024-04-09 09:03:34 -04:00
Chen Yu
8e39c05efd
Get the l2 cache size via environment variable on confidential VM
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The CPUID(leaf:2 or leaf:0x80000006) is not supported on some confidential
VMs. As a result the get_l2_size() returns the default 512M which brings
performance issues.
Introduce the environment variable OPENBLAS_L2_SIZE provided by the user
to get the l2 cache size.
Suggested-by: "Keshavamurthy, Anil S" <anil.s.keshavamurthy@intel.com >
Signed-off-by: Chen Yu <yu.c.chen@intel.com >
2024-04-05 11:39:01 +08:00
Honglin Zhu
90f041e348
Invoke the syscall to allow the use of amx tiles
2023-05-19 10:48:18 +08:00
Martin Kroeker
437c0bf2b4
Merge pull request #3843 from Mousius/switch-ratio
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Propagate SWITCH_RATIO to DYNAMIC_ARCH builds
2023-04-19 11:51:54 +02:00
Chris Sidebottom
32f2fafde7
Propagate SWITCH_RATIO to DYNAMIC_ARCH builds
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Previously dynamic builds were either using the default SWITCH_RATIO
or one from the higher level architecture; this patch ensures the
dynamic builds can use this parameter as well.
2023-04-17 15:34:12 +01:00
Martin Kroeker
38d6fb4225
Fix dependencies in builds with specified subsets of precision types
2023-02-23 23:12:06 +01:00
Martin Kroeker
5481c328e8
fix DYNAMIC_ARCH builds that use only a subset of precisions
2023-02-22 00:28:25 +01:00
Martin Kroeker
c9d78dc3b2
Remove excess initializer (leftover from rework of PR 3793)
2022-10-31 16:57:03 +01:00
Honglin Zhu
4989e039a5
Define SBGEMM_ALIGN_K for DYNAMIC_ARCH build
2022-10-27 14:10:26 +08:00
Honglin Zhu
843e9fd0b9
Fix typo error
2022-10-26 17:06:33 +08:00
Honglin Zhu
b00d5b9746
New sbgemm implementation for Neoverse N2
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1. Use UZP instructions but not gather load and scatter store instructions to get lower latency.
2. Padding k to a power of 4.
2022-10-26 15:09:41 +08:00
gxw
fbfe1daf6e
LoongArch64: Add DYNAMIC_ARCH support
2022-07-28 14:28:45 +08:00
Martin Kroeker
40302558ed
Remove extraneous (and wrong) definition of sbgemm_r on x86_64
2022-03-23 20:05:32 +01:00
Martin Kroeker
d9894f45d3
Define sbgemm_r to fix DYNAMIC_ARCH builds
2022-02-25 10:04:00 +01:00
Wangyang Guo
3dc6052c7e
initial support for Sapphire Rapids platform
2021-10-12 01:30:40 -07:00
Wangyang Guo
1d83ca4bca
Small Matrix: support BFLOAT16 data type
2021-08-30 17:40:20 +08:00
Wangyang Guo
478d1086c1
Small Matrix: support DYNAMIC_ARCH build
2021-08-04 03:12:41 +00:00
gxw
4b548857d6
Add msa support for loongson
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1. Using core loongson3r3 and loongson3r4 for loongson
2. Add DYNAMIC_ARCH for loongson
Change-Id: I1c6b54dbeca3a0cc31d1222af36a7e9bd6ab54c1
2020-12-09 10:28:46 +08:00
Chen, Guobing
a7b1f9b1bb
Implementation of BF16 based gemv
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1. Add a new API -- sbgemv to support bfloat16 based gemv
2. Implement a generic kernel for sbgemv
3. Implement an avx512-bf16 based kernel for sbgemv
Signed-off-by: Chen, Guobing <guobing.chen@intel.com >
2020-10-29 02:08:23 +08:00
Martin Kroeker
10379fc83b
Use ifdef instead of if
2020-10-15 19:05:37 +02:00
