mirror of
https://github.com/OpenMathLib/OpenBLAS
synced 2026-05-31 00:45:48 +08:00
ce79fe12fd
The compiler options that enable 16 bit floating point instructions should not be enabled by default when building the RISCV64_ZVL128B and RISCV64_ZVL256B targets. The zfh and zvfh extensions are not part of the 'V' extension and are not required by any of the RVA profiles. There's no guarantee that kernels built with zfh and zvfh will work correctly on fully compliant RVA23U64 devices. To fix the issue we only build the RISCV64_ZVL128B and RISCV64_ZVL256B kernels with the half float flags if BUILD_HFLOAT16=1. We also update the RISC-V dynamic detection code to disable the RISCV64_ZVL128B and RISCV64_ZVL256B kernels at runtime if we've built with DYNAMIC_ARCH=1 and BUILD_HFLOAT16=1 and are running on a device that does not support both Zfh and Zvfh. Fixes: https://github.com/OpenMathLib/OpenBLAS/issues/5428
114 lines
2.6 KiB
Makefile
114 lines
2.6 KiB
Makefile
# This is triggered by Makefile.system and runs before any of the code is built.
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export BINARY
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export USE_OPENMP
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ifdef DYNAMIC_ARCH
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override HOST_CFLAGS += -DDYNAMIC_ARCH
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endif
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ifdef TARGET_CORE
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TARGET_MAKE = Makefile_kernel.conf
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TARGET_CONF = config_kernel.h
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else
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TARGET_MAKE = Makefile.conf
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TARGET_CONF = config.h
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endif
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ifdef USE_PERL
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SCRIPTSUFFIX = .pl
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else
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SCRIPTSUFFIX =
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endif
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# CPUIDEMU = ../../cpuid/table.o
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ifdef CPUIDEMU
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EXFLAGS = -DCPUIDEMU -DVENDOR=99
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endif
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ifeq ($(TARGET), MIPS24K)
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TARGET_FLAGS = -mips32r2
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endif
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ifeq ($(TARGET), MIPS1004K)
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TARGET_FLAGS = -mips32r2
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endif
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ifeq ($(TARGET), P5600)
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TARGET_FLAGS = -mips32r5
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endif
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ifeq ($(TARGET), I6400)
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TARGET_FLAGS = -mips64r6
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endif
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ifeq ($(TARGET), P6600)
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TARGET_FLAGS = -mips64r6
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endif
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ifeq ($(TARGET), I6500)
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TARGET_FLAGS = -mips64r6
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endif
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ifeq ($(TARGET), C910V)
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TARGET_FLAGS = -march=rv64gcv0p7_zfh_xtheadc -mabi=lp64d
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endif
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ifeq ($(TARGET), CK860FV)
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TARGET_FLAGS = -march=ck860v -mcpu=ck860fv -mfdivdu -mhard-float
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endif
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ifeq ($(TARGET), x280)
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TARGET_FLAGS = -march=rv64imafdcv_zba_zbb_zfh -mabi=lp64d
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endif
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ifeq ($(TARGET), RISCV64_ZVL256B)
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TARGET_FLAGS = -march=rv64imafdcv -mabi=lp64d
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endif
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ifeq ($(TARGET), RISCV64_ZVL128B)
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TARGET_FLAGS = -march=rv64imafdcv -mabi=lp64d
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endif
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ifeq ($(TARGET), RISCV64_GENERIC)
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TARGET_FLAGS = -march=rv64imafdc -mabi=lp64d
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endif
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all: getarch_2nd
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./getarch_2nd 0 >> $(TARGET_MAKE)
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./getarch_2nd 1 >> $(TARGET_CONF)
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$(TARGET_CONF): c_check$(SCRIPTSUFFIX) f_check$(SCRIPTSUFFIX) getarch
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./c_check$(SCRIPTSUFFIX) $(TARGET_MAKE) $(TARGET_CONF) "$(CC)" $(TARGET_FLAGS) $(CFLAGS)
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ifneq ($(ONLY_CBLAS), 1)
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./f_check$(SCRIPTSUFFIX) $(TARGET_MAKE) $(TARGET_CONF) "$(FC)" $(TARGET_FLAGS)
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else
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#When we only build CBLAS, we set NOFORTRAN=2
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echo "NOFORTRAN=2" >> $(TARGET_MAKE)
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echo "NO_FBLAS=1" >> $(TARGET_MAKE)
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echo "F_COMPILER=GFORTRAN" >> $(TARGET_MAKE)
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echo "BU=_" >> $(TARGET_MAKE)
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echo "#define BUNDERSCORE _" >> $(TARGET_CONF)
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echo "#define NEEDBUNDERSCORE 1" >> $(TARGET_CONF)
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endif
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./getarch 0 >> $(TARGET_MAKE)
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./getarch 1 >> $(TARGET_CONF)
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getarch : getarch.c cpuid.S dummy $(CPUIDEMU)
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avx512=$$(./c_check$(SCRIPTSUFFIX) - - "$(CC)" $(TARGET_FLAGS) $(CFLAGS) | grep NO_AVX512); \
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rv64gv=$$(./c_check$(SCRIPTSUFFIX) - - "$(CC)" $(TARGET_FLAGS) $(CFLAGS) | grep NO_RV64GV); \
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$(HOSTCC) $(HOST_CFLAGS) $(EXFLAGS) $${avx512:+-D$${avx512}} $${rv64gv:+-D$${rv64gv}} -o $(@F) getarch.c cpuid.S $(CPUIDEMU)
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getarch_2nd : getarch_2nd.c $(TARGET_CONF) dummy
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ifndef TARGET_CORE
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$(HOSTCC) -I. $(HOST_CFLAGS) -o $(@F) getarch_2nd.c
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else
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$(HOSTCC) -I. $(HOST_CFLAGS) -DBUILD_KERNEL -o $(@F) getarch_2nd.c
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endif
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dummy:
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.PHONY: dummy
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