Chip Kerchner d69be17b6f Convert 2X LMUL1 instructions to 1X LMUL2. Improved FP64 GEMM edges - up to more than 3X faster.

2026-03-30 18:50:27 +00:00

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alpha

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arm

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arm64

Accelerate SVE128 SBGEMM/BGEMM

2026-03-05 13:50:07 +00:00

csky

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e2k

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generic

Add Infrastructure for SHGEMV

2025-10-07 15:03:24 +00:00

ia64

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loongarch64

Fix floating point registers ld/st bug of Loongarch

2025-12-03 10:52:59 +08:00

mips

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mips64

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power

Add pragma to limit optimization level

2026-02-22 13:42:41 +01:00

riscv64

Convert 2X LMUL1 instructions to 1X LMUL2. Improved FP64 GEMM edges - up to more than 3X faster.

2026-03-30 18:50:27 +00:00

simd

Refine WebAssembly SIMD backend scope

2026-03-18 17:24:02 +09:00

sparc

Use the generic C kernel for DNRM2

2026-01-11 21:58:31 +01:00

wasm

Enable SAXPY for WebAssembly SIMD backend

2026-03-18 21:27:45 +09:00

x86

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x86_64

Merge pull request #5685 from teddygood/wasm-intrin-backend-exp

2026-03-18 21:49:53 +01:00

zarch

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CMakeLists.txt

set USE_TRMM for WASM

2026-03-15 23:07:16 +01:00

Makefile

typo

2026-01-15 00:03:24 +01:00

Makefile.L1

Add infrastructure for bgemv/bscal

2025-07-15 14:48:57 +01:00

Makefile.L2

Add Infrastructure for SHGEMV

2025-10-07 15:03:24 +00:00

Makefile.L3

set USE_TRMM for WASM

2026-03-15 23:07:16 +01:00

Makefile.LA

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setparam-ref.c

Increase LA464/16MB DGEMM_R for minimal spacing of 64 to MAX(p,q)

2026-01-17 20:53:51 +01:00