diff --git a/configuration/README.md b/configuration/README.md index 3372e818..004c2411 100644 --- a/configuration/README.md +++ b/configuration/README.md @@ -147,6 +147,7 @@ These variables are optional that can be specified in the design configuration f | `CTS_SINK_CLUSTERING_SIZE` | Specifies the maximum number of sinks per cluster.
(Default: `25`) | | `CTS_SINK_CLUSTERING_MAX_DIAMETER` | Specifies maximum diameter (in micron) of sink cluster.
(Default: `50`) | | `CTS_REPORT_TIMING` | Specifies whether or not to run STA after clock tree synthesis using OpenROAD's estimate_parasitics -placement and generates reports under `logs/cts`. 1 = Enabled, 0 = Disabled.
(Default: `1`) | +| `CTS_CLK_MAX_WIRE_LENGTH` | Specifies the maximum wire length on the clock net. Value in microns.
(Default: `0`) | | `LIB_CTS` | The liberty file used for CTS. By default, this is the `LIB_SYNTH_COMPLETE` minus the cells with drc errors as specified by the drc exclude list.
(Default: `$::env(TMP_DIR)/cts.lib`) | ### Routing @@ -155,6 +156,8 @@ These variables are optional that can be specified in the design configuration f |---------------|---------------------------------------------------------------| | `GLB_RT_MINLAYER` | The number of lowest layer to be used in routing.
(Default: `1`)| | `GLB_RT_MAXLAYER` | The number of highest layer to be used in routing.
(Default: `6`)| +| `GLB_RT_CLOCK_MINLAYER` | The number of lowest layer to be used in routing the clock net.
(Default: `GLB_RT_MINLAYER`)| +| `GLB_RT_CLOCK_MAXLAYER` | The number of highest layer to be used in routing the clock net.
(Default: `GLB_RT_MAXLAYER`)| | `GLB_RT_ADJUSTMENT` | Reduction in the routing capacity of the edges between the cells in the global routing graph. Values range from 0 to 1.
1 = most reduction, 0 = least reduction
(Default: `0`)| | `GLB_RT_L1_ADJUSTMENT` | Reduction in the routing capacity of the edges between the cells in the global routing graph but specific to li1 layer in sky130A. Values range from 0 to 1
(Default: `0.99`) | | `GLB_RT_L2_ADJUSTMENT` | Reduction in the routing capacity of the edges between the cells in the global routing graph but specific to met1 in sky130A. Values range from 0 to 1
(Default: `0`) | diff --git a/configuration/cts.tcl b/configuration/cts.tcl index 0c2c89aa..67b2a3cf 100755 --- a/configuration/cts.tcl +++ b/configuration/cts.tcl @@ -19,3 +19,4 @@ set ::env(CTS_TOLERANCE) 100 set ::env(CTS_SINK_CLUSTERING_SIZE) 25 set ::env(CTS_SINK_CLUSTERING_MAX_DIAMETER) 50 set ::env(CTS_REPORT_TIMING) 1 +set ::env(CTS_CLK_MAX_WIRE_LENGTH) 0 diff --git a/scripts/openroad/cts.tcl b/scripts/openroad/cts.tcl index 547a00d8..e14fe41a 100755 --- a/scripts/openroad/cts.tcl +++ b/scripts/openroad/cts.tcl @@ -67,7 +67,7 @@ set_propagated_clock [all_clocks] estimate_parasitics -placement puts "\[INFO]: Repairing long wires on clock nets..." # CTS leaves a long wire from the pad to the clock tree root. -repair_clock_nets +repair_clock_nets -max_wire_length $::env(CTS_CLK_MAX_WIRE_LENGTH) estimate_parasitics -placement write_def $::env(SAVE_DEF) diff --git a/scripts/openroad/groute.tcl b/scripts/openroad/groute.tcl index 5c4d84f8..4243c1ad 100755 --- a/scripts/openroad/groute.tcl +++ b/scripts/openroad/groute.tcl @@ -39,13 +39,13 @@ if { $::env(DIODE_INSERTION_STRATEGY) == 3 } { set signal_min_layer [lindex $::env(TECH_METAL_LAYERS) [expr {$::env(GLB_RT_MINLAYER)-1}]] set signal_max_layer [lindex $::env(TECH_METAL_LAYERS) [expr {$::env(GLB_RT_MAXLAYER)-1}]] -if { ![info exists ::env(CLB_RT_CLOCK_MIN_LAYER)] } { +if { ![info exists ::env(GLB_RT_CLOCK_MINLAYER)] } { set clock_min_layer $signal_min_layer } else { set clock_min_layer [lindex $::env(TECH_METAL_LAYERS) [expr {$::env(GLB_RT_CLOCK_MINLAYER)-1}]] } -if { ![info exists ::env(CLB_RT_CLOCK_MAX_LAYER)] } { +if { ![info exists ::env(GLB_RT_CLOCK_MAXLAYER)] } { set clock_max_layer $signal_max_layer } else { set clock_max_layer [lindex $::env(TECH_METAL_LAYERS) [expr {$::env(GLB_RT_CLOCK_MAXLAYER)-1}]] diff --git a/scripts/openroad/resizer_routing_timing.tcl b/scripts/openroad/resizer_routing_timing.tcl index 3bd1b8df..60387eb5 100644 --- a/scripts/openroad/resizer_routing_timing.tcl +++ b/scripts/openroad/resizer_routing_timing.tcl @@ -41,13 +41,13 @@ if { [info exists ::env(DONT_USE_CELLS)] } { set signal_min_layer [lindex $::env(TECH_METAL_LAYERS) [expr {$::env(GLB_RT_MINLAYER)-1}]] set signal_max_layer [lindex $::env(TECH_METAL_LAYERS) [expr {$::env(GLB_RT_MAXLAYER)-1}]] -if { ![info exists ::env(CLB_RT_CLOCK_MIN_LAYER)] } { +if { ![info exists ::env(GLB_RT_CLOCK_MINLAYER)] } { set clock_min_layer $signal_min_layer } else { set clock_min_layer [lindex $::env(TECH_METAL_LAYERS) [expr {$::env(GLB_RT_CLOCK_MINLAYER)-1}]] } -if { ![info exists ::env(CLB_RT_CLOCK_MAX_LAYER)] } { +if { ![info exists ::env(GLB_RT_CLOCK_MAXLAYER)] } { set clock_max_layer $signal_max_layer } else { set clock_max_layer [lindex $::env(TECH_METAL_LAYERS) [expr {$::env(GLB_RT_CLOCK_MAXLAYER)-1}]]