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Network::id for maps/sets

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commit be70d30ae05665021254b0d7e69fb8d2f0a82890
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 17:04:49 2023 -0700

    cmp

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 4d4ef96948afe3d6a00c4521aeb5bc74274f5737
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 16:08:50 2023 -0700

    rvo, const

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit bb584e4264af2bea867b17d07e8d38c0e9eb0025
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 15:05:00 2023 -0700

    const

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit a08fe558bca6b769b2728882258bd85aed990a27
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 14:57:33 2023 -0700

    LibertyPortPair no ptrs

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 4d3bd60c109d1ce9d0589d746f4968fa7bebd90d
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 14:13:07 2023 -0700

    cleanup

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit dc25ff77771cfbe26f9318bad2b3c45879614783
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 14:06:13 2023 -0700

    const

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 06e81586ce11a0cc06948ed78fef99353077d69e
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 14:01:10 2023 -0700

    sortByName

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 9d8592aff5b246f83e47e1b94490e3cef8d8e119
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 11:57:17 2023 -0700

    sort pred

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 462a8e14df8b561ddfc842addc62c4b8435b6347
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 11:09:57 2023 -0700

    const

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 69f71505b684e88b22d395510429497e87bf1015
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 10:45:14 2023 -0700

    flush ConstPortSeq

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 6429d578b78eac3fe7e99fcd67a120789932b2eb
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 09:19:15 2023 -0700

    rm ConstNetSet

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit f247930b16e40560b957a36af68947249ed1ef04
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 17 08:50:50 2023 -0700

    sortPathNames

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 4ca2b0e0af7252c7bcbc65cf141d0ce40634d329
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 16 10:14:05 2023 -0700

    const

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 3d18640d2ebc4aae3098c7e7242a554fcb64fd42
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 16 09:41:27 2023 -0700

    set_input/ouput_delay -reference_pin

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit d4a0854dd2102f46f96a94fb9eb8749f1593a85f
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 16 09:13:46 2023 -0700

    PinPairSet no malloc

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit a6f1583fc6a856c5ecc0dcb15a1d8b1f61e30718
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 16 08:53:33 2023 -0700

    no malloc for EdgePins

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit c8e4b92e8b619109d6aa3c141c720646067ccb4b
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 16 06:31:08 2023 +0000

    leak

commit abab99e0fc3e466d914f6c1705aa08cdc204df51
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 16 06:07:36 2023 +0000

    leaks

commit d1913b554bb6e98b89673d80d2295f552eb4ffca
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 19:48:39 2023 -0700

    LibertyCell::checkCornerCell

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit bcc172237d48deed647374f9592bac70bd2d5425
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 18:19:47 2023 -0700

    rvo

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 8ef9800b87f5e5548055a13afc21397f28a6bcf7
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 18:07:46 2023 -0700

    sdc net id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit d7235abed04ced4e2d84e91bf9968e621268567d
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 16:00:27 2023 -0700

    range iter

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit a22f91a3c54c644574339d1126821d9bc8045bd6
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 15:52:50 2023 -0700

    range iter

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 762615ce3de91d950eeaaa4680549a45b13e0e0a
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 15:42:19 2023 -0700

    range iter

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 7e0c531613d343d23f064c24873bf5a498f6f4ce
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 12:26:49 2023 -0700

    rm removeLoadCaps, removeNetLoadCaps

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit f2e88c6082e2d4605e9849348008bf4065401fc8
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 12:21:03 2023 -0700

    sdc rm map ptrs

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit b5939666188c0b94dfe957e22bbd8a92f4786125
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 11:36:16 2023 -0700

    sdc rm map ptrs

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit a435081bafe10260743319f53a59cbe2ed0388b7
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 08:43:37 2023 -0700

    sdc rm map ptrs

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit acfb247559db7b726d47f203613488df0f7add53
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 08:38:07 2023 -0700

    sdc rm map ptrs

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 7541b71da92ea15085615988a1e6ea1d4d53d8d6
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 08:00:55 2023 -0700

    sdc rm map ptrs

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit d033210132656ea68fa834228575b9def1d02d90
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 07:52:03 2023 -0700

    sdc rm map ptrs

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit ca6e9ecb7821b83ab024c4fee6df8f7fc8fc2ce2
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 07:38:12 2023 -0700

    instance_pvt_maps_

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 631e4209b596386f5818045d521784db5239f58d
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 07:26:42 2023 -0700

    rm GroupPathIterator

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 059c32afa87617fff530c9afa1ef8005a136739d
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sat Jan 14 20:07:44 2023 -0700

    rm ClockIterator

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit c65fe873a6a6696220bbb44c4ecac87d5ca978ac
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sat Jan 14 19:45:58 2023 -0700

    rvo

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit ce15c9a0cc78915acddc2f03749573d989ae96d6
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 15 01:04:03 2023 +0000

    leaks

commit f97955a0c7e70b65ceb3f697ff47c0524a9b3cd4
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sat Jan 14 01:17:58 2023 +0000

    leaks

commit 7cdd65684adeb14e02827f5d93e7fab3b19af5dd
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Jan 13 16:07:47 2023 -0700

    leaks

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit ee97c7e50394a3927458e7ef09c5dbeb27719d15
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Jan 13 11:52:48 2023 -0700

    swig rm Tmp collections

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit c49935da8704e41459280971b7645fccd97e3d13
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Jan 13 11:18:36 2023 -0700

    swig rm Tmp types

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 4320b00ce700914843006f592126cd8cc1c4657a
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Jan 13 10:55:10 2023 -0700

    swig rm TmpPinSet, TmpPinSeq

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit ff6004910980c9b09b41f63a553a4481404cc539
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Jan 13 10:45:06 2023 -0700

    swig rm Tmp collections

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 9a5bf5c1a3e5a6d2996b3ab327fa2f3015f2ff20
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Jan 13 10:15:29 2023 -0700

    swig rm one TmpPinSet

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit f441116b56e23849485b2393b30e7086c33165a8
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Jan 13 09:16:56 2023 -0700

    leak

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 050b08df8618340b568d9cd41fd3d5f052e2c680
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Jan 13 09:10:53 2023 -0700

    leak

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit be8c17f3a715ab53140748dc1d94698209965cf9
Author: James Cherry <cherry@parallaxsw.com>
Date:   Fri Jan 13 08:59:06 2023 -0700

    leak

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit e43b82f8fb52eaeda90e3c7e76cf350ae6735ebd
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 18:57:49 2023 -0700

    range iter

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 8db56209de7805ac2574fd2f76170bf68afd156d
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 18:08:54 2023 -0700

    GroupPathSet net id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit cb7917f9827c2ea3afebd735cd4508405a0d77d4
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 12:00:15 2023 -0700

    DataCheckLess net id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit d9da3c62d7a76699c6ad62cebb1f5c39f89722fa
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 11:42:27 2023 -0700

    rm hashPtr uses

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 5bbea162bb1e023aba813598c7992c740ddf9d0b
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 11:30:12 2023 -0700

    EdgePins has use net id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit df38405e2ebaabdd7bbf99f3b19d78b25bd95720
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 09:51:38 2023 -0700

    ExceptionPath hash use net id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 9a6dcfa54c54c9f50b14248a2449c70c20a0d977
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 08:56:49 2023 -0700

    ClockInsertion, ClockLatency net id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit dbb6dc0b8c93812458df31e93f08e0dbd74e8105
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 08:34:03 2023 -0700

    ExceptionStateSet obj id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 70b8721c48ec0816289ee09b664c332ee095875f
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 08:14:37 2023 -0700

    ClockGroups cmp

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 4c6c4ca191a99cd8541e106fec3202ee14968f39
Author: James Cherry <cherry@parallaxsw.com>
Date:   Thu Jan 12 07:38:17 2023 -0700

    ClockGroup typedef to ClockSet

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 66f425315e16deee5f00b05c0a505766e7afbf01
Author: James Cherry <cherry@parallaxsw.com>
Date:   Wed Jan 11 20:32:38 2023 -0700

    set cmps

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit a94866c7828af5b6714e3e4fffc13bdaf5155c0e
Author: James Cherry <cherry@parallaxsw.com>
Date:   Wed Jan 11 19:08:09 2023 -0700

    net use id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 6348320908f42ebb5262117182e13d0024f65537
Author: James Cherry <cherry@parallaxsw.com>
Date:   Wed Jan 11 11:52:13 2023 -0700

    exception id cmp

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 0edfca41b6d6408ac17f8dfe10e697c55146c1ef
Author: James Cherry <cherry@parallaxsw.com>
Date:   Wed Jan 11 10:47:02 2023 -0700

    range iter

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 44ad77985da9f0b9e7f4780e3f233c8d94fa7db7
Author: James Cherry <cherry@parallaxsw.com>
Date:   Wed Jan 11 08:27:58 2023 -0700

    non-ptr set cmp

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 36de7d88c3fa683465604a9e16b2fc1f6bc5fdd0
Author: James Cherry <cherry@parallaxsw.com>
Date:   Wed Jan 11 08:00:54 2023 -0700

    range iteration

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 4a31a2c8d9bdae58b09af8c05a64702ea3ac6c15
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 10 16:43:54 2023 -0700

    tcl types

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 056a7447b494a4c8ecc9764650d78a5bed3d87e8
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 10 16:10:36 2023 -0700

    tcl types

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 97239554c7625ba50ee729260f08eda7dec02365
Author: James Cherry <cherry@parallaxsw.com>
Date:   Tue Jan 10 13:10:42 2023 -0700

    use RVO

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit c3247d8937d483102e3e1f2b69d7ac1d331ba9d4
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 9 22:41:20 2023 -0700

    swig template seq's

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 5431c06feb256adb46858819fcf5d513cfa6b5ec
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 9 20:50:24 2023 -0700

    swig set in template

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 592ad641bf01d3beb862314a0d8986f66e258642
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 9 17:27:25 2023 -0700

    network return containers

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit c95f8b77e0d6bd5ffa5ba8102413c70883c756e1
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 9 12:15:37 2023 -0700

    PinSeq const

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 702e7f9ba2f901066a38f32e67b35602b6c7bbdf
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 9 12:02:29 2023 -0700

    InstanceSeq const

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 44fc25ba4a15e4ae570d74af27c9435872a126e0
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 9 12:01:45 2023 -0700

    NetSeq const

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 03b2725c81f5d52c33c875b55056c11d482144f1
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 9 11:33:18 2023 -0700

    rm PortPair

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 3fb82a7344dc053171c9883a113764ba691ab827
Author: James Cherry <cherry@parallaxsw.com>
Date:   Mon Jan 9 11:20:53 2023 -0700

    PinSet id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 3dd31f027e15d40d62a11d0a88ef2a115f01fb73
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 8 15:03:33 2023 -0700

    InstanceSet id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit a91dea5cc0af3bede36b3faed13adb05239ff907
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 8 11:40:15 2023 -0700

    NetSet id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit b91e4b6410134eccae7969ddcfb0b27933b2e746
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 8 10:44:47 2023 -0700

    CellSet, PortSet id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 6f891f77fae5a6b19c1454a1a4b4e3dfae0b5c50
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 8 10:29:25 2023 -0700

    network object sets

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit eb8c627a57ecc6e7c5846a01d62b090ff91c08bf
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sun Jan 8 10:09:00 2023 -0700

    PinSet1

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

commit 8e864ecbdf87000fbb3c3097c39f06173c941e35
Author: James Cherry <cherry@parallaxsw.com>
Date:   Sat Jan 7 17:13:03 2023 -0700

    concrete network object id

    Signed-off-by: James Cherry <cherry@parallaxsw.com>

Signed-off-by: James Cherry <cherry@parallaxsw.com>
This commit is contained in:
James Cherry
2023-01-19 11:23:45 -07:00
parent 440247d0b5
commit 3f7df84fb8
144 changed files with 4509 additions and 4732 deletions
Download Patch File Download Diff File Expand all files Collapse all files

459
sdc/WriteSdc.cc
View File

@@ -46,6 +46,7 @@
#include "Sdc.hh"
#include "Fuzzy.hh"
#include "StaState.hh"
#include "Corner.hh"
#include "WriteSdcPvt.hh"
namespace sta {
@@ -465,9 +466,9 @@ WriteSdc::writeGeneratedClock(Clock *clk) const
}
void
WriteSdc::writeClockPins(Clock *clk) const
WriteSdc::writeClockPins(const Clock *clk) const
{
PinSet &pins = clk->pins();
const PinSet &pins = clk->pins();
if (!pins.empty()) {
if (pins.size() > 1)
gzprintf(stream_, "\\\n ");
@@ -476,16 +477,16 @@ WriteSdc::writeClockPins(Clock *clk) const
}
void
WriteSdc::writeClockSlews(Clock *clk) const
WriteSdc::writeClockSlews(const Clock *clk) const
{
WriteGetClock write_clk(clk, this);
RiseFallMinMax *slews = clk->slews();
if (slews->hasValue())
writeRiseFallMinMaxTimeCmd("set_clock_transition", slews, write_clk);
const RiseFallMinMax slews = clk->slews();
if (slews.hasValue())
writeRiseFallMinMaxTimeCmd("set_clock_transition", &slews, write_clk);
}
void
WriteSdc::writeClockUncertainty(Clock *clk) const
WriteSdc::writeClockUncertainty(const Clock *clk) const
{
float setup;
bool setup_exists;
@@ -504,7 +505,7 @@ WriteSdc::writeClockUncertainty(Clock *clk) const
}
void
WriteSdc::writeClockUncertainty(Clock *clk,
WriteSdc::writeClockUncertainty(const Clock *clk,
const char *setup_hold,
float value) const
{
@@ -586,9 +587,7 @@ WriteSdc::writeClockLatencies() const
void
WriteSdc::writeClockInsertions() const
{
ClockInsertions::Iterator insert_iter(sdc_->clockInsertions());
while (insert_iter.hasNext()) {
ClockInsertion *insert = insert_iter.next();
for (ClockInsertion *insert : sdc_->clockInsertions()) {
const Pin *pin = insert->pin();
const Clock *clk = insert->clock();
if (pin && clk) {
@@ -719,14 +718,10 @@ WriteSdc::writeOutputDelays() const
for (OutputDelay *output_delay : sdc_->outputDelays())
delays.push_back(output_delay);
PortDelayLess port_delay_less(sdc_network_);
sort(delays, port_delay_less);
sort(delays, PortDelayLess(sdc_network_));
PortDelaySeq::Iterator delay_iter(delays);
while (delay_iter.hasNext()) {
PortDelay *output_delay = delay_iter.next();
for (PortDelay *output_delay : delays)
writePortDelay(output_delay, false, "set_output_delay");
}
}
void
@@ -803,7 +798,7 @@ WriteSdc::writePortDelay(PortDelay *port_delay,
{
gzprintf(stream_, "%s ", sdc_cmd);
writeTime(delay);
ClockEdge *clk_edge = port_delay->clkEdge();
const ClockEdge *clk_edge = port_delay->clkEdge();
if (clk_edge) {
writeClockKey(clk_edge->clock());
if (clk_edge->transition() == RiseFall::fall())
@@ -812,7 +807,7 @@ WriteSdc::writePortDelay(PortDelay *port_delay,
gzprintf(stream_, "%s%s -add_delay ",
transRiseFallFlag(rf),
minMaxFlag(min_max));
Pin *ref_pin = port_delay->refPin();
const Pin *ref_pin = port_delay->refPin();
if (ref_pin) {
gzprintf(stream_, "-reference_pin ");
writeGetPin(ref_pin, true);
@@ -906,24 +901,21 @@ bool
ClockGroupLess::operator()(const ClockGroup *clk_group1,
const ClockGroup *clk_group2) const
{
ClockSet *clk_set1 = clk_group1->clks();
ClockSet *clk_set2 = clk_group2->clks();
size_t size1 = clk_set1->size();
size_t size2 = clk_set2->size();
size_t size1 = clk_group1->size();
size_t size2 = clk_group2->size();
if (size1 < size2)
return true;
else if (size1 > size2)
return false;
else {
ClockSeq clks1, clks2;
ClockSet::Iterator clk_iter1(clk_set1);
while (clk_iter1.hasNext())
clks1.push_back(clk_iter1.next());
ClockSeq clks1;
for (Clock *clk1 : *clk_group1)
clks1.push_back(clk1);
sort(clks1, ClockNameLess());
ClockSet::Iterator clk_iter2(clk_set2);
while (clk_iter2.hasNext())
clks2.push_back(clk_iter2.next());
ClockSeq clks2;
for (Clock *clk2 : *clk_group2)
clks2.push_back(clk2);
sort(clks2, ClockNameLess());
ClockSeq::Iterator clk_iter3(clks1);
@@ -977,7 +969,7 @@ WriteSdc::writeClockGroups(ClockGroups *clk_groups) const
if (!first)
gzprintf(stream_, "\\\n");
gzprintf(stream_, " -group ");
writeGetClocks(clk_group->clks());
writeGetClocks(clk_group);
first = false;
}
writeCmdComment(clk_groups);
@@ -1000,25 +992,19 @@ WriteSdc::writeDisables() const
void
WriteSdc::writeDisabledCells() const
{
DisabledCellPortsSeq disables;
sortDisabledCellPortsMap(sdc_->disabledCellPorts(), disables);
DisabledCellPortsSeq::Iterator disabled_iter(disables);
while (disabled_iter.hasNext()) {
DisabledCellPorts *disable = disabled_iter.next();
LibertyCell *cell = disable->cell();
DisabledCellPortsSeq disables = sortByName(sdc_->disabledCellPorts());
for (const DisabledCellPorts *disable : disables) {
const LibertyCell *cell = disable->cell();
if (disable->all()) {
gzprintf(stream_, "set_disable_timing ");
writeGetLibCell(cell);
gzprintf(stream_, "\n");
}
if (disable->fromTo()) {
LibertyPortPairSeq pairs;
sortLibertyPortPairSet(disable->fromTo(), pairs);
LibertyPortPairSeq::Iterator pair_iter(pairs);
while (pair_iter.hasNext()) {
LibertyPortPair *from_to = pair_iter.next();
const LibertyPort *from = from_to->first;
const LibertyPort *to = from_to->second;
LibertyPortPairSeq from_tos = sortByName(disable->fromTo());
for (const LibertyPortPair &from_to : from_tos) {
const LibertyPort *from = from_to.first;
const LibertyPort *to = from_to.second;
gzprintf(stream_, "set_disable_timing -from {%s} -to {%s} ",
from->name(),
to->name());
@@ -1027,11 +1013,8 @@ WriteSdc::writeDisabledCells() const
}
}
if (disable->from()) {
LibertyPortSeq from;
sortLibertyPortSet(disable->from(), from);
LibertyPortSeq::Iterator from_iter(from);
while (from_iter.hasNext()) {
LibertyPort *from_port = from_iter.next();
LibertyPortSeq from = sortByName(disable->from());
for (const LibertyPort *from_port : from) {
gzprintf(stream_, "set_disable_timing -from {%s} ",
from_port->name());
writeGetLibCell(cell);
@@ -1039,11 +1022,8 @@ WriteSdc::writeDisabledCells() const
}
}
if (disable->to()) {
LibertyPortSeq to;
sortLibertyPortSet(disable->to(), to);
LibertyPortSeq::Iterator to_iter(to);
while (to_iter.hasNext()) {
LibertyPort *to_port = to_iter.next();
LibertyPortSeq to = sortByName(disable->to());
for (const LibertyPort *to_port : to) {
gzprintf(stream_, "set_disable_timing -to {%s} ",
to_port->name());
writeGetLibCell(cell);
@@ -1063,11 +1043,8 @@ WriteSdc::writeDisabledCells() const
void
WriteSdc::writeDisabledPorts() const
{
PortSeq ports;
sortPortSet(sdc_->disabledPorts(), sdc_network_, ports);
PortSeq::Iterator port_iter(ports);
while (port_iter.hasNext()) {
Port *port = port_iter.next();
const PortSeq ports = sortByName(sdc_->disabledPorts(), sdc_network_);
for (const Port *port : ports) {
gzprintf(stream_, "set_disable_timing ");
writeGetPort(port);
gzprintf(stream_, "\n");
@@ -1077,11 +1054,8 @@ WriteSdc::writeDisabledPorts() const
void
WriteSdc::writeDisabledLibPorts() const
{
LibertyPortSeq ports;
sortLibertyPortSet(sdc_->disabledLibPorts(), ports);
LibertyPortSeq::Iterator port_iter(ports);
while (port_iter.hasNext()) {
LibertyPort *port = port_iter.next();
LibertyPortSeq ports = sortByName(sdc_->disabledLibPorts());
for (LibertyPort *port : ports) {
gzprintf(stream_, "set_disable_timing ");
writeGetLibPin(port);
gzprintf(stream_, "\n");
@@ -1091,12 +1065,9 @@ WriteSdc::writeDisabledLibPorts() const
void
WriteSdc::writeDisabledInstances() const
{
DisabledInstancePortsSeq disables;
sortDisabledInstancePortsMap(sdc_->disabledInstancePorts(),
sdc_network_, disables);
DisabledInstancePortsSeq::Iterator disabled_iter(disables);
while (disabled_iter.hasNext()) {
DisabledInstancePorts *disable = disabled_iter.next();
DisabledInstancePortsSeq disables = sortByPathName(sdc_->disabledInstancePorts(),
sdc_network_);
for (DisabledInstancePorts *disable : disables) {
Instance *inst = disable->instance();
if (disable->all()) {
gzprintf(stream_, "set_disable_timing ");
@@ -1104,13 +1075,10 @@ WriteSdc::writeDisabledInstances() const
gzprintf(stream_, "\n");
}
else if (disable->fromTo()) {
LibertyPortPairSeq pairs;
sortLibertyPortPairSet(disable->fromTo(), pairs);
LibertyPortPairSeq::Iterator pair_iter(pairs);
while (pair_iter.hasNext()) {
LibertyPortPair *from_to = pair_iter.next();
const LibertyPort *from_port = from_to->first;
const LibertyPort *to_port = from_to->second;
LibertyPortPairSeq from_tos = sortByName(disable->fromTo());
for (LibertyPortPair &from_to : from_tos) {
const LibertyPort *from_port = from_to.first;
const LibertyPort *to_port = from_to.second;
gzprintf(stream_, "set_disable_timing -from {%s} -to {%s} ",
from_port->name(),
to_port->name());
@@ -1119,11 +1087,8 @@ WriteSdc::writeDisabledInstances() const
}
}
if (disable->from()) {
LibertyPortSeq from;
sortLibertyPortSet(disable->from(), from);
LibertyPortSeq::Iterator from_iter(from);
while (from_iter.hasNext()) {
LibertyPort *from_port = from_iter.next();
LibertyPortSeq from = sortByName(disable->from());
for (const LibertyPort *from_port : from) {
gzprintf(stream_, "set_disable_timing -from {%s} ",
from_port->name());
writeGetInstance(inst);
@@ -1131,11 +1096,8 @@ WriteSdc::writeDisabledInstances() const
}
}
if (disable->to()) {
LibertyPortSeq to;
sortLibertyPortSet(disable->to(), to);
LibertyPortSeq::Iterator to_iter(to);
while (to_iter.hasNext()) {
LibertyPort *to_port = to_iter.next();
LibertyPortSeq to = sortByName(disable->to());
for (const LibertyPort *to_port : to) {
gzprintf(stream_, "set_disable_timing -to {%s} ",
to_port->name());
writeGetInstance(inst);
@@ -1148,11 +1110,8 @@ WriteSdc::writeDisabledInstances() const
void
WriteSdc::writeDisabledPins() const
{
PinSeq pins;
sortPinSet(sdc_->disabledPins(), sdc_network_, pins);
PinSeq::Iterator pin_iter(pins);
while (pin_iter.hasNext()) {
Pin *pin = pin_iter.next();
PinSeq pins = sortByPathName(sdc_->disabledPins(), sdc_network_);
for (const Pin *pin : pins) {
gzprintf(stream_, "set_disable_timing ");
writeGetPin(pin, false);
gzprintf(stream_, "\n");
@@ -1163,15 +1122,10 @@ void
WriteSdc::writeDisabledEdges() const
{
EdgeSeq edges;
EdgeSet::Iterator edge_iter(sdc_->disabledEdges());
while (edge_iter.hasNext()) {
Edge *edge = edge_iter.next();
for (Edge *edge : *sdc_->disabledEdges())
edges.push_back(edge);
}
sortEdges(&edges, sdc_network_, graph_);
EdgeSeq::Iterator edge_iter2(edges);
while (edge_iter2.hasNext()) {
Edge *edge = edge_iter2.next();
for (Edge *edge : edges) {
EdgeSet matches;
findMatchingEdges(edge, matches);
if (matches.size() == 1)
@@ -1200,9 +1154,7 @@ bool
WriteSdc::edgeSenseIsUnique(Edge *edge,
EdgeSet &matches) const
{
EdgeSet::Iterator match_iter(matches);
while (match_iter.hasNext()) {
Edge *match = match_iter.next();
for (Edge *match : matches) {
if (match != edge
&& match->sense() == edge->sense())
return false;
@@ -1235,10 +1187,10 @@ void
WriteSdc::writeExceptions() const
{
ExceptionPathSeq exceptions;
sortExceptions(sdc_->exceptions(), exceptions, sdc_network_);
ExceptionPathSeq::Iterator except_iter(exceptions);
while (except_iter.hasNext()) {
ExceptionPath *exception = except_iter.next();
for (ExceptionPath *exception : *sdc_->exceptions())
exceptions.push_back(exception);
sort(exceptions, ExceptionPathLess(network_));
for (ExceptionPath *exception : exceptions) {
if (!exception->isFilter()
&& !exception->isLoop())
writeException(exception);
@@ -1252,11 +1204,8 @@ WriteSdc::writeException(ExceptionPath *exception) const
if (exception->from())
writeExceptionFrom(exception->from());
if (exception->thrus()) {
ExceptionThruSeq::Iterator thru_iter(exception->thrus());
while (thru_iter.hasNext()) {
ExceptionThru *thru = thru_iter.next();
for (ExceptionThru *thru : *exception->thrus())
writeExceptionThru(thru);
}
}
if (exception->to())
writeExceptionTo(exception->to());
@@ -1353,11 +1302,8 @@ WriteSdc::writeExceptionFromTo(ExceptionFromTo *from_to,
gzprintf(stream_, "[list ");
bool first = true;
if (from_to->pins()) {
PinSeq pins;
sortPinSet(from_to->pins(), sdc_network_, pins);
PinSeq::Iterator pin_iter(pins);
while (pin_iter.hasNext()) {
Pin *pin = pin_iter.next();
PinSeq pins = sortByPathName(from_to->pins(), sdc_network_);
for (const Pin *pin : pins) {
if (multi_objs && !first)
gzprintf(stream_, "\\\n ");
writeGetPin(pin, map_hpin_to_drvr);
@@ -1367,11 +1313,8 @@ WriteSdc::writeExceptionFromTo(ExceptionFromTo *from_to,
if (from_to->clks())
writeGetClocks(from_to->clks(), multi_objs, first);
if (from_to->instances()) {
InstanceSeq insts;
sortInstanceSet(from_to->instances(), sdc_network_, insts);
InstanceSeq::Iterator inst_iter(insts);
while (inst_iter.hasNext()) {
Instance *inst = inst_iter.next();
InstanceSeq insts = sortByPathName(from_to->instances(), sdc_network_);
for (const Instance *inst : insts) {
if (multi_objs && !first)
gzprintf(stream_, "\\\n ");
writeGetInstance(inst);
@@ -1402,9 +1345,7 @@ WriteSdc::writeExceptionThru(ExceptionThru *thru) const
gzprintf(stream_, "[list ");
bool first = true;
sort(pins, PinPathNameLess(network_));
PinSeq::Iterator pin_iter(pins);
while (pin_iter.hasNext()) {
Pin *pin = pin_iter.next();
for (const Pin *pin : pins) {
if (multi_objs && !first)
gzprintf(stream_, "\\\n ");
writeGetPin(pin);
@@ -1412,11 +1353,8 @@ WriteSdc::writeExceptionThru(ExceptionThru *thru) const
}
if (thru->nets()) {
NetSeq nets;
sortNetSet(thru->nets(), sdc_network_, nets);
NetSeq::Iterator net_iter(nets);
while (net_iter.hasNext()) {
Net *net = net_iter.next();
NetSeq nets = sortByPathName(thru->nets(), sdc_network_);
for (const Net *net : nets) {
if (multi_objs && !first)
gzprintf(stream_, "\\\n ");
writeGetNet(net);
@@ -1424,11 +1362,8 @@ WriteSdc::writeExceptionThru(ExceptionThru *thru) const
}
}
if (thru->instances()) {
InstanceSeq insts;
sortInstanceSet(thru->instances(), sdc_network_, insts);
InstanceSeq::Iterator inst_iter(insts);
while (inst_iter.hasNext()) {
Instance *inst = inst_iter.next();
InstanceSeq insts = sortByPathName(thru->instances(), sdc_network_);
for (const Instance *inst : insts) {
if (multi_objs && !first)
gzprintf(stream_, "\\\n ");
writeGetInstance(inst);
@@ -1444,14 +1379,14 @@ WriteSdc::mapThruHpins(ExceptionThru *thru,
PinSeq &pins) const
{
if (thru->pins()) {
for (Pin *pin : *thru->pins()) {
for (const Pin *pin : *thru->pins()) {
// Map hierarical pins to load pins outside of outputs or inside of inputs.
if (network_->isHierarchical(pin)) {
Instance *hinst = network_->instance(pin);
bool hpin_is_output = network_->direction(pin)->isAnyOutput();
PinConnectedPinIterator *cpin_iter = network_->connectedPinIterator(pin);
while (cpin_iter->hasNext()) {
Pin *cpin = cpin_iter->next();
const Pin *cpin = cpin_iter->next();
if (network_->isLoad(cpin)
&& ((hpin_is_output
&& !network_->isInside(network_->instance(cpin), hinst))
@@ -1473,21 +1408,14 @@ void
WriteSdc::writeDataChecks() const
{
Vector<DataCheck*> checks;
DataChecksMap::Iterator checks_iter(sdc_->data_checks_to_map_);
while (checks_iter.hasNext()) {
DataCheckSet *checks1 = checks_iter.next();
DataCheckSet::Iterator check_iter(checks1);
while (check_iter.hasNext()) {
DataCheck *check = check_iter.next();
for (auto pin_checks : sdc_->data_checks_to_map_) {
DataCheckSet *checks1 = pin_checks.second;
for (DataCheck *check : *checks1)
checks.push_back(check);
}
}
sort(checks, DataCheckLess(sdc_network_));
Vector<DataCheck*>::Iterator check_iter(checks);
while (check_iter.hasNext()) {
DataCheck *check = check_iter.next();
for (DataCheck *check : checks)
writeDataCheck(check);
}
}
void
@@ -1582,29 +1510,28 @@ WriteSdc::writeWireload() const
void
WriteSdc::writeNetLoads() const
{
if (sdc_->net_wire_cap_map_) {
for (auto net_cap : *sdc_->net_wire_cap_map_) {
Net *net = net_cap.first;
MinMaxFloatValues &caps = net_cap.second;
float min_cap, max_cap;
bool min_exists, max_exists;
caps.value(MinMax::min(), min_cap, min_exists);
caps.value(MinMax::max(), max_cap, max_exists);
if (min_exists && max_exists
&& min_cap == max_cap)
writeNetLoad(net, MinMaxAll::all(), min_cap);
else {
if (min_exists)
writeNetLoad(net, MinMaxAll::min(), min_cap);
if (max_exists)
writeNetLoad(net, MinMaxAll::max(), max_cap);
}
int corner_index = 0; // missing corner arg
for (auto net_cap : sdc_->net_wire_cap_maps_[corner_index]) {
const Net *net = net_cap.first;
MinMaxFloatValues &caps = net_cap.second;
float min_cap, max_cap;
bool min_exists, max_exists;
caps.value(MinMax::min(), min_cap, min_exists);
caps.value(MinMax::max(), max_cap, max_exists);
if (min_exists && max_exists
&& min_cap == max_cap)
writeNetLoad(net, MinMaxAll::all(), min_cap);
else {
if (min_exists)
writeNetLoad(net, MinMaxAll::min(), min_cap);
if (max_exists)
writeNetLoad(net, MinMaxAll::max(), max_cap);
}
}
}
void
WriteSdc::writeNetLoad(Net *net,
WriteSdc::writeNetLoad(const Net *net,
const MinMaxAll *min_max,
float cap) const
{
@@ -1628,9 +1555,10 @@ WriteSdc::writePortLoads() const
}
void
WriteSdc::writePortLoads(Port *port) const
WriteSdc::writePortLoads(const Port *port) const
{
PortExtCap *ext_cap = sdc_->portExtCap(port);
const Corner *corner = corners_->findCorner(0); // missing corner arg
PortExtCap *ext_cap = sdc_->portExtCap(port, corner);
if (ext_cap) {
WriteGetPort write_port(port, this);
writeRiseFallMinMaxCapCmd("set_load -pin_load",
@@ -1748,11 +1676,11 @@ WriteSdc::writeDrivingCell(Port *port,
const RiseFall *rf,
const MinMax *min_max) const
{
LibertyCell *cell = drive_cell->cell();
LibertyPort *from_port = drive_cell->fromPort();
LibertyPort *to_port = drive_cell->toPort();
const LibertyCell *cell = drive_cell->cell();
const LibertyPort *from_port = drive_cell->fromPort();
const LibertyPort *to_port = drive_cell->toPort();
float *from_slews = drive_cell->fromSlews();
LibertyLibrary *lib = drive_cell->library();
const LibertyLibrary *lib = drive_cell->library();
gzprintf(stream_, "set_driving_cell");
if (rf)
gzprintf(stream_, " %s", transRiseFallFlag(rf));
@@ -1795,19 +1723,13 @@ WriteSdc::writeInputTransitions() const
void
WriteSdc::writeNetResistances() const
{
NetResistanceMap *net_res_map = sdc_->netResistances();
NetSeq nets;
NetResistanceMap::Iterator res_iter(net_res_map);
while (res_iter.hasNext()) {
Net *net;
MinMaxFloatValues values;
res_iter.next(net, values);
for (auto net_res : sdc_->netResistances()) {
const Net *net = net_res.first;
nets.push_back(net);
}
sort(nets, NetPathNameLess(sdc_network_));
NetSeq::Iterator net_iter(nets);
while (net_iter.hasNext()) {
Net *net = net_iter.next();
for (const Net *net : nets) {
float min_res, max_res;
bool min_exists, max_exists;
sdc_->resistance(net, MinMax::min(), min_res, min_exists);
@@ -1825,7 +1747,7 @@ WriteSdc::writeNetResistances() const
}
void
WriteSdc::writeNetResistance(Net *net,
WriteSdc::writeNetResistance(const Net *net,
const MinMaxAll *min_max,
float res) const
{
@@ -1841,15 +1763,12 @@ WriteSdc::writeConstants() const
{
PinSeq pins;
sortedLogicValuePins(sdc_->logicValues(), pins);
PinSeq::Iterator pin_iter(pins);
while (pin_iter.hasNext()) {
Pin *pin = pin_iter.next();
for (const Pin *pin : pins)
writeConstant(pin);
}
}
void
WriteSdc::writeConstant(Pin *pin) const
WriteSdc::writeConstant(const Pin *pin) const
{
const char *cmd = setConstantCmd(pin);
gzprintf(stream_, "%s ", cmd);
@@ -1858,7 +1777,7 @@ WriteSdc::writeConstant(Pin *pin) const
}
const char *
WriteSdc::setConstantCmd(Pin *pin) const
WriteSdc::setConstantCmd(const Pin *pin) const
{
LogicValue value;
bool exists;
@@ -1883,16 +1802,13 @@ WriteSdc::writeCaseAnalysis() const
{
PinSeq pins;
sortedLogicValuePins(sdc_->caseLogicValues(), pins);
PinSeq::Iterator pin_iter(pins);
while (pin_iter.hasNext()) {
Pin *pin = pin_iter.next();
for (const Pin *pin : pins)
writeCaseAnalysis(pin);
}
}
void
WriteSdc::writeCaseAnalysis(Pin *pin) const
WriteSdc::writeCaseAnalysis(const Pin *pin) const
{
const char *value_str = caseAnalysisValueStr(pin);
gzprintf(stream_, "set_case_analysis %s ", value_str);
@@ -1901,7 +1817,7 @@ WriteSdc::writeCaseAnalysis(Pin *pin) const
}
const char *
WriteSdc::caseAnalysisValueStr(Pin *pin) const
WriteSdc::caseAnalysisValueStr(const Pin *pin) const
{
LogicValue value;
bool exists;
@@ -1923,15 +1839,12 @@ WriteSdc::caseAnalysisValueStr(Pin *pin) const
}
void
WriteSdc::sortedLogicValuePins(LogicValueMap *value_map,
WriteSdc::sortedLogicValuePins(LogicValueMap &value_map,
PinSeq &pins) const
{
LogicValueMap::ConstIterator value_iter(value_map);
while (value_iter.hasNext()) {
LogicValue value;
const Pin *pin;
value_iter.next(pin, value);
pins.push_back(const_cast<Pin*>(pin));
for (auto pin_value : value_map) {
const Pin *pin = pin_value.first;
pins.push_back(pin);
}
// Sort pins.
sort(pins, PinPathNameLess(sdc_network_));
@@ -1946,11 +1859,9 @@ WriteSdc::writeDeratings() const
if (factors)
writeDerating(factors);
NetDeratingFactorsMap::Iterator net_iter(sdc_->net_derating_factors_);
while (net_iter.hasNext()) {
const Net *net;
DeratingFactorsNet *factors;
net_iter.next(net, factors);
for (auto net_derating : sdc_->net_derating_factors_) {
const Net *net = net_derating.first;
DeratingFactorsNet *factors = net_derating.second;
WriteGetNet write_net(net, this);
for (auto early_late : EarlyLate::range()) {
writeDerating(factors, TimingDerateType::net_delay, early_late,
@@ -1958,20 +1869,16 @@ WriteSdc::writeDeratings() const
}
}
InstDeratingFactorsMap::Iterator inst_iter(sdc_->inst_derating_factors_);
while (inst_iter.hasNext()) {
const Instance *inst;
DeratingFactorsCell *factors;
inst_iter.next(inst, factors);
for (auto inst_derating : sdc_->inst_derating_factors_) {
const Instance *inst = inst_derating.first;
DeratingFactorsCell *factors = inst_derating.second;
WriteGetInstance write_inst(inst, this);
writeDerating(factors, &write_inst);
}
CellDeratingFactorsMap::Iterator cell_iter(sdc_->cell_derating_factors_);
while (cell_iter.hasNext()) {
const LibertyCell *cell;
DeratingFactorsCell *factors;
cell_iter.next(cell, factors);
for (auto cell_derating : sdc_->cell_derating_factors_) {
const LibertyCell *cell = cell_derating.first;
DeratingFactorsCell *factors = cell_derating.second;
WriteGetLibCell write_cell(cell, this);
writeDerating(factors, &write_cell);
}
@@ -2120,30 +2027,23 @@ WriteSdc::writeDesignRules() const
void
WriteSdc::writeMinPulseWidths() const
{
PinMinPulseWidthMap::Iterator
pin_iter(sdc_->pin_min_pulse_width_map_);
while (pin_iter.hasNext()) {
const Pin *pin;
RiseFallValues *min_widths;
pin_iter.next(pin, min_widths);
for (auto pin_widths : sdc_->pin_min_pulse_width_map_) {
const Pin *pin = pin_widths.first;
RiseFallValues *min_widths = pin_widths.second;
WriteGetPin write_obj(pin, false, this);
writeMinPulseWidths(min_widths, write_obj);
}
InstMinPulseWidthMap::Iterator
inst_iter(sdc_->inst_min_pulse_width_map_);
while (inst_iter.hasNext()) {
const Instance *inst;
RiseFallValues *min_widths;
inst_iter.next(inst, min_widths);
for (auto inst_widths : sdc_->inst_min_pulse_width_map_) {
const Instance *inst = inst_widths.first;
RiseFallValues *min_widths = inst_widths.second;
WriteGetInstance write_obj(inst, this);
writeMinPulseWidths(min_widths, write_obj);
}
ClockMinPulseWidthMap::Iterator
clk_iter(sdc_->clk_min_pulse_width_map_);
while (clk_iter.hasNext()) {
const Clock *clk;
RiseFallValues *min_widths;
clk_iter.next(clk, min_widths);
for (auto clk_widths : sdc_->clk_min_pulse_width_map_) {
const Clock *clk = clk_widths.first;
RiseFallValues *min_widths = clk_widths.second;
WriteGetClock write_obj(clk, this);
writeMinPulseWidths(min_widths, write_obj);
}
@@ -2185,36 +2085,29 @@ WriteSdc::writeMinPulseWidth(const char *hi_low,
void
WriteSdc::writeLatchBorowLimits() const
{
PinLatchBorrowLimitMap::Iterator
pin_iter(sdc_->pin_latch_borrow_limit_map_);
while (pin_iter.hasNext()) {
const Pin *pin;
float limit;
pin_iter.next(pin, limit);
for (auto pin_borrow : sdc_->pin_latch_borrow_limit_map_) {
const Pin *pin = pin_borrow.first;
float limit = pin_borrow.second;
gzprintf(stream_, "set_max_time_borrow ");
writeTime(limit);
gzprintf(stream_, " ");
writeGetPin(pin, false);
gzprintf(stream_, "\n");
}
InstLatchBorrowLimitMap::Iterator
inst_iter(sdc_->inst_latch_borrow_limit_map_);
while (inst_iter.hasNext()) {
const Instance *inst;
float limit;
inst_iter.next(inst, limit);
for (auto inst_borrow : sdc_->inst_latch_borrow_limit_map_) {
const Instance *inst = inst_borrow.first;
float limit = inst_borrow.second;
gzprintf(stream_, "set_max_time_borrow ");
writeTime(limit);
gzprintf(stream_, " ");
writeGetInstance(inst);
gzprintf(stream_, "\n");
}
ClockLatchBorrowLimitMap::Iterator
clk_iter(sdc_->clk_latch_borrow_limit_map_);
while (clk_iter.hasNext()) {
const Clock *clk;
float limit;
clk_iter.next(clk, limit);
for (auto clk_borrow : sdc_->clk_latch_borrow_limit_map_) {
const Clock *clk = clk_borrow.first;
float limit = clk_borrow.second;
gzprintf(stream_, "set_max_time_borrow ");
writeTime(limit);
gzprintf(stream_, " ");
@@ -2261,9 +2154,7 @@ WriteSdc::writeClkSlewLimits() const
const MinMax *min_max = MinMax::max();
ClockSeq clks;
sdc_->sortedClocks(clks);
ClockSeq::Iterator clk_iter(clks);
while (clk_iter.hasNext()) {
Clock *clk = clk_iter.next();
for (const Clock *clk : clks) {
float rise_clk_limit, fall_clk_limit, rise_data_limit, fall_data_limit;
bool rise_clk_exists, fall_clk_exists, rise_data_exists, fall_data_exists;
clk->slewLimit(RiseFall::rise(), PathClkOrData::clk, min_max,
@@ -2337,11 +2228,9 @@ WriteSdc::writeCapLimits(const MinMax *min_max,
gzprintf(stream_, " [current_design]\n");
}
PortCapLimitMap::Iterator port_iter(sdc_->port_cap_limit_map_);
while (port_iter.hasNext()) {
Port *port;
MinMaxFloatValues values;
port_iter.next(port, values);
for (auto port_limit : sdc_->port_cap_limit_map_) {
const Port *port = port_limit.first;
MinMaxFloatValues values = port_limit.second;
float cap;
bool exists;
values.value(min_max, cap, exists);
@@ -2354,11 +2243,9 @@ WriteSdc::writeCapLimits(const MinMax *min_max,
}
}
PinCapLimitMap::Iterator pin_iter(sdc_->pin_cap_limit_map_);
while (pin_iter.hasNext()) {
Pin *pin;
MinMaxFloatValues values;
pin_iter.next(pin, values);
for (auto pin_limit : sdc_->pin_cap_limit_map_) {
const Pin *pin = pin_limit.first;
MinMaxFloatValues values = pin_limit.second;
float cap;
bool exists;
values.value(min_max, cap, exists);
@@ -2441,7 +2328,7 @@ WriteSdc::writeVariables() const
////////////////////////////////////////////////////////////////
void
WriteSdc::writeGetTimingArcsOfOjbects(LibertyCell *cell) const
WriteSdc::writeGetTimingArcsOfOjbects(const LibertyCell *cell) const
{
gzprintf(stream_, "[%s -of_objects ", getTimingArcsCmd());
writeGetLibCell(cell);
@@ -2513,11 +2400,8 @@ WriteSdc::writeGetClocks(ClockSet *clks,
bool multiple,
bool &first) const
{
ClockSeq clks1;
sortClockSet(clks, clks1);
ClockSeq::Iterator clk_iter(clks1);
while (clk_iter.hasNext()) {
Clock *clk = clk_iter.next();
ClockSeq clks1 = sortByName(clks);
for (const Clock *clk : clks1) {
if (multiple && !first)
gzprintf(stream_, "\\\n ");
writeGetClock(clk);
@@ -2539,13 +2423,12 @@ WriteSdc::writeGetPort(const Port *port) const
}
void
WriteSdc::writeGetPins(PinSet *pins,
WriteSdc::writeGetPins(const PinSet *pins,
bool map_hpin_to_drvr) const
{
PinSeq pins1;
if (map_hpins_) {
PinSet leaf_pins;
for (Pin *pin : *pins) {
PinSet leaf_pins(network_);;
for (const Pin *pin : *pins) {
if (network_->isHierarchical(pin)) {
if (map_hpin_to_drvr)
findLeafDriverPins(const_cast<Pin*>(pin), network_, &leaf_pins);
@@ -2555,11 +2438,13 @@ WriteSdc::writeGetPins(PinSet *pins,
else
leaf_pins.insert(pin);
}
sortPinSet(&leaf_pins, sdc_network_, pins1);
PinSeq pins1 = sortByPathName(&leaf_pins, sdc_network_);
writeGetPins1(&pins1);
}
else {
PinSeq pins1 = sortByPathName(pins, sdc_network_);
writeGetPins1(&pins1);
}
else
sortPinSet(pins, sdc_network_, pins1);
writeGetPins1(&pins1);
}
void
@@ -2568,10 +2453,8 @@ WriteSdc::writeGetPins1(PinSeq *pins) const
bool multiple = pins->size() > 1;
if (multiple)
gzprintf(stream_, "[list ");
PinSeq::Iterator pin_iter(pins);
bool first = true;
while (pin_iter.hasNext()) {
Pin *pin = pin_iter.next();
for (const Pin *pin : *pins) {
if (multiple && !first)
gzprintf(stream_, "\\\n ");
writeGetPin(pin);
@@ -2595,7 +2478,7 @@ WriteSdc::writeGetPin(const Pin *pin,
bool map_hpin_to_drvr) const
{
if (map_hpins_ && network_->isHierarchical(pin)) {
PinSet pins;
PinSet pins(network_);
pins.insert(const_cast<Pin*>(pin));
writeGetPins(&pins, map_hpin_to_drvr);
}
@@ -2663,7 +2546,7 @@ WriteSdc::writeCommentSeparator() const
void
WriteSdc::writeRiseFallMinMaxTimeCmd(const char *sdc_cmd,
RiseFallMinMax *values,
const RiseFallMinMax *values,
WriteSdcObject &write_object) const
{
writeRiseFallMinMaxCmd(sdc_cmd, values, units_->timeUnit()->scale(),
@@ -2672,7 +2555,7 @@ WriteSdc::writeRiseFallMinMaxTimeCmd(const char *sdc_cmd,
void
WriteSdc::writeRiseFallMinMaxCapCmd(const char *sdc_cmd,
RiseFallMinMax *values,
const RiseFallMinMax *values,
WriteSdcObject &write_object) const
{
writeRiseFallMinMaxCmd(sdc_cmd, values, units_->capacitanceUnit()->scale(),
@@ -2681,7 +2564,7 @@ WriteSdc::writeRiseFallMinMaxCapCmd(const char *sdc_cmd,
void
WriteSdc::writeRiseFallMinMaxCmd(const char *sdc_cmd,
RiseFallMinMax *values,
const RiseFallMinMax *values,
float scale,
WriteSdcObject &write_object) const
{
@@ -2897,10 +2780,8 @@ WriteSdc::writeFloatSeq(FloatSeq *floats,
float scale) const
{
gzprintf(stream_, "{");
FloatSeq::ConstIterator iter(floats);
bool first = true;
while (iter.hasNext()) {
float flt = iter.next();
for (float flt : *floats) {
if (!first)
gzprintf(stream_, " ");
writeFloat(flt * scale);
@@ -2913,10 +2794,8 @@ void
WriteSdc::writeIntSeq(IntSeq *ints) const
{
gzprintf(stream_, "{");
IntSeq::ConstIterator iter(ints);
bool first = true;
while (iter.hasNext()) {
int i = iter.next();
for (int i : *ints) {
if (!first)
gzprintf(stream_, " ");
gzprintf(stream_, "%d", i);