mirror of
https://github.com/The-OpenROAD-Project/OpenSTA.git
synced 2026-05-30 00:24:12 +08:00
get_* -filter allow true/false, '.' in glob pattern resolves #416
Signed-off-by: James Cherry <cherry@parallaxsw.com>
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@@ -1,24 +1,11 @@
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[get_cells -filter liberty_cell==BUFx2_ASAP7_75t_R *]
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u1
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[get_clocks -filter is_virtual==0 *]
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clk
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[get_clocks -filter is_virtual==1 *]
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vclk
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[get_clocks -filter is_virtual *]
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vclk
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[get_clocks -filter is_virtual&&is_generated *]
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[get_clocks -filter is_virtual&&is_generated==0 *]
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vclk
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[get_clocks -filter is_virtual||is_generated *]
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vclk
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[get_clocks -filter is_virtual==0||is_generated *]
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clk
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[get_lib_cells -filter is_buffer==1 *]
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[get_lib_cells -filter is_buffer *]
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asap7_small/BUFx2_ASAP7_75t_R
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[get_lib_cells -filter is_inverter==0 *]
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asap7_small/AND2x2_ASAP7_75t_R
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asap7_small/BUFx2_ASAP7_75t_R
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asap7_small/DFFHQx4_ASAP7_75t_R
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[get_lib_cells -filter is_inverter *]
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asap7_small/INVx2_ASAP7_75t_R
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[get_lib_pins -filter direction==input BUFx2_ASAP7_75t_R/*]
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A
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[get_lib_pins -filter direction==output BUFx2_ASAP7_75t_R/*]
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@@ -54,9 +41,22 @@ in2
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out
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[get_cells -filter {name ~= *r1*} *]
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Error: 2600 -filter parsing failed at '~= *r1*'.
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direction == input && name =~ clk*
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clk1
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clk2
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clk3
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(direction == input) && (name =~ clk*)"
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clk1
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clk2
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clk3
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[get_clocks -filter is_virtual||is_generated *]
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vclk
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[get_clocks -filter is_virtual==0 *]
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clk
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[get_clocks -filter is_virtual==false *]
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clk
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[get_clocks -filter is_virtual==1 *]
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vclk
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[get_clocks -filter is_virtual==true *]
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vclk
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{direction == input} {name =~ clk*} {is_clock == 1} && &&
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@@ -5,29 +5,16 @@ link_design top
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create_clock -name clk -period 500 {clk1 clk2 clk3}
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create_clock -name vclk -period 1000
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# Test filters for each SDC get_* command.
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puts {[get_cells -filter liberty_cell==BUFx2_ASAP7_75t_R *]}
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report_object_full_names [get_cells -filter liberty_cell==BUFx2_ASAP7_75t_R *]
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puts {[get_clocks -filter is_virtual==0 *]}
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report_object_full_names [get_clocks -filter is_virtual==0 *]
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puts {[get_clocks -filter is_virtual==1 *]}
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report_object_full_names [get_clocks -filter is_virtual==1 *]
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puts {[get_clocks -filter is_virtual *]}
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report_object_full_names [get_clocks -filter is_virtual *]
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puts {[get_clocks -filter is_virtual&&is_generated *]}
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report_object_full_names [get_clocks -filter is_virtual&&is_generated *]
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puts {[get_clocks -filter is_virtual&&is_generated==0 *]}
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report_object_full_names [get_clocks -filter is_virtual&&is_generated==0 *]
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puts {[get_clocks -filter is_virtual||is_generated *]}
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report_object_full_names [get_clocks -filter is_virtual||is_generated *]
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puts {[get_clocks -filter is_virtual==0||is_generated *]}
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report_object_full_names [get_clocks -filter is_virtual==0||is_generated *]
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puts {[get_lib_cells -filter is_buffer==1 *]}
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report_object_full_names [get_lib_cells -filter is_buffer==1 *]
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puts {[get_lib_cells -filter is_inverter==0 *]}
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report_object_full_names [get_lib_cells -filter is_inverter==0 *]
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puts {[get_lib_cells -filter is_buffer *]}
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report_object_full_names [get_lib_cells -filter is_buffer *]
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puts {[get_lib_cells -filter is_inverter *]}
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report_object_full_names [get_lib_cells -filter is_inverter *]
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puts {[get_lib_pins -filter direction==input BUFx2_ASAP7_75t_R/*]}
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report_object_full_names [get_lib_pins -filter direction==input BUFx2_ASAP7_75t_R/*]
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@@ -55,9 +42,32 @@ puts {[get_cells -filter {name ~= *r1*} *]}
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catch {get_cells -filter {name ~= *r1*} *} result
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puts $result
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# AND pattern match expr
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# AND expr
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puts {direction == input && name =~ clk*}
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report_object_names [get_ports -filter "direction == input && name =~ clk*" *]
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# parens around sub-exprs
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puts {(direction == input) && (name =~ clk*)"}
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report_object_names [get_ports -filter "(direction == input) && (name =~ clk*)" *]
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sta::filter_expr_to_postfix "direction == input && name =~ clk* && is_clock" 1
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# OR expr
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puts {[get_clocks -filter is_virtual||is_generated *]}
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report_object_full_names [get_clocks -filter is_virtual||is_generated *]
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# unary==0 / unary==false
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puts {[get_clocks -filter is_virtual==0 *]}
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report_object_full_names [get_clocks -filter is_virtual==0 *]
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puts {[get_clocks -filter is_virtual==false *]}
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report_object_full_names [get_clocks -filter is_virtual==false *]
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# unary==1 / unary==true
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puts {[get_clocks -filter is_virtual==1 *]}
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report_object_full_names [get_clocks -filter is_virtual==1 *]
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puts {[get_clocks -filter is_virtual==true *]}
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report_object_full_names [get_clocks -filter is_virtual==true *]
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# glob pattern with . (literal dot, no match symantics)
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report_object_full_names [get_cells -filter {name =~ .1} *]
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puts [sta::filter_expr_to_postfix "direction == input && name =~ clk* && is_clock"]
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@@ -5,6 +5,7 @@ Y
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[get_lib_pins -of_objects [get_lib_cells *]]
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A
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A
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A
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B
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CLK
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D
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@@ -13,3 +14,4 @@ IQN
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Q
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Y
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Y
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Y
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@@ -11,9 +11,11 @@ vclk
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asap7_small/AND2x2_ASAP7_75t_R
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asap7_small/BUFx2_ASAP7_75t_R
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asap7_small/DFFHQx4_ASAP7_75t_R
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asap7_small/INVx2_ASAP7_75t_R
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[get_lib_pins]
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A
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A
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A
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B
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CLK
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D
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@@ -22,6 +24,7 @@ IQN
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Q
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Y
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Y
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Y
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[get_libs]
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asap7_small
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[get_nets]
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@@ -9,9 +9,11 @@ vclk
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asap7_small/AND2x2_ASAP7_75t_R
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asap7_small/BUFx2_ASAP7_75t_R
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asap7_small/DFFHQx4_ASAP7_75t_R
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asap7_small/INVx2_ASAP7_75t_R
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[get_lib_pins [get_lib_pins]]
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A
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A
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A
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B
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CLK
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D
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@@ -20,6 +22,7 @@ IQN
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Q
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Y
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Y
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Y
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[get_libs [get_libs]]
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asap7_small
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[get_nets [get_nets]]
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