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Merge branch 'master' into sta_update_upstream_lvf_stuff

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This commit is contained in:
dsengupta0628
2026-03-20 19:50:24 +00:00
parent b58fb44657 2e6dd04837
commit af791b9974
168 changed files with 2628169 additions and 42 deletions
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6
parasitics/test/CMakeLists.txt Normal file
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sta_module_tests("parasitics"
TESTS
spef
)
add_subdirectory(cpp)

16
parasitics/test/cpp/CMakeLists.txt Normal file
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add_executable(TestParasitics TestParasitics.cc)
target_link_libraries(TestParasitics
OpenSTA
GTest::gtest
GTest::gtest_main
${TCL_LIBRARY}
)
target_include_directories(TestParasitics PRIVATE
${STA_HOME}/include/sta
${STA_HOME}
${CMAKE_BINARY_DIR}/include/sta
)
gtest_discover_tests(TestParasitics
WORKING_DIRECTORY ${STA_HOME}
PROPERTIES LABELS "cpp\;module_parasitics"
)

2598
parasitics/test/cpp/TestParasitics.cc Normal file
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15
parasitics/test/parasitics_spef.ok Normal file
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Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13178, timing group from output port.
Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13211, timing group from output port.
Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13244, timing group from output port.
Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13277, timing group from output port.
Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13310, timing group from output port.
Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13343, timing group from output port.
Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 13376, timing group from output port.
Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 14772, timing group from output port.
Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 14805, timing group from output port.
Warning 1212: ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz line 14838, timing group from output port.
r1q total_cap=1.3922564510505161e-14 pin_cap=5.225650124681606e-16 wire_cap=1.3399999392157882e-14
r2q total_cap=1.3977042281540768e-14 pin_cap=5.770419894103802e-16 wire_cap=1.3400000239190829e-14
u1z total_cap=1.3965708133673559e-14 pin_cap=5.65708000361848e-16 wire_cap=1.3400000239190829e-14
u2z total_cap=1.4021215896773027e-14 pin_cap=6.212170340107377e-16 wire_cap=1.3399998545124935e-14
No paths found.

29
parasitics/test/parasitics_spef.tcl Normal file
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# Test SPEF read and parasitics reporting
# reg1_asap7 uses ASAP7 cells
read_liberty ../../test/asap7/asap7sc7p5t_SEQ_RVT_FF_nldm_220123.lib
read_liberty ../../test/asap7/asap7sc7p5t_INVBUF_RVT_FF_nldm_220122.lib.gz
read_liberty ../../test/asap7/asap7sc7p5t_SIMPLE_RVT_FF_nldm_211120.lib.gz
read_liberty ../../test/asap7/asap7sc7p5t_OA_RVT_FF_nldm_211120.lib.gz
read_liberty ../../test/asap7/asap7sc7p5t_AO_RVT_FF_nldm_211120.lib.gz
read_verilog ../../test/reg1_asap7.v
link_design top
create_clock -name clk1 -period 10 [get_ports clk1]
# Read SPEF
read_spef ../../test/reg1_asap7.spef
set corner [sta::cmd_scene]
foreach net_name {r1q r2q u1z u2z} {
set net [get_nets $net_name]
set total_cap [$net capacitance $corner "max"]
set pin_cap [$net pin_capacitance $corner "max"]
set wire_cap [$net wire_capacitance $corner "max"]
puts "$net_name total_cap=$total_cap pin_cap=$pin_cap wire_cap=$wire_cap"
if {$total_cap <= 0.0} {
error "expected positive capacitance on net $net_name after SPEF read"
}
}
report_checks -fields {slew cap input_pins fanout}

1
parasitics/test/regression Symbolic link
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../../test/regression

1
parasitics/test/save_ok Symbolic link
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../../test/shared/save_ok