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examples

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This commit is contained in:
James Cherry
2019-03-21 10:48:50 -07:00
parent 5a5164276e
commit e2d02839a3
13 changed files with 259 additions and 204 deletions
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examples/example1.v Normal file
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module top (in1, in2, clk1, clk2, clk3, out);
input in1, in2, clk1, clk2, clk3;
output out;
wire r1q, r2q, u1z, u2z;
DFF_X1 r1 (.D(in1), .CK(clk1), .Q(r1q));
DFF_X1 r2 (.D(in2), .CK(clk2), .Q(r2q));
BUF_X1 u1 (.A(r2q), .Z(u1z));
AND2_X1 u2 (.A1(r1q), .A2(u1z), .ZN(u2z));
DFF_X1 r3 (.D(u2z), .CK(clk3), .Q(out));
endmodule // top