16 Commits

Author SHA1 Message Date
James Cherry
63efee64bf tidy round1 2026-04-13 14:59:05 -07:00
Deepashree Sengupta
c887b2e4b3 Bias pin handling (#409)
* Update STA to exclude bias pins from timing graph and subsequently in write_verilog

Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>

* unnecessary space in orig verilog

Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>

* Update to use well supplies rather than bias pins

Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>

---------

Signed-off-by: dsengupta0628 <dsengupta@precisioninno.com>
2026-04-07 11:00:01 -07:00
James Cherry
981f44db68 update copyright
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-03-10 14:57:45 -07:00
James Cherry
d42b821c00 rel 3.0
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2026-01-13 09:36:45 -07:00
James Cherry
2a4fd08211 update copyright
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2025-01-21 18:54:33 -07:00
James Cherry
422a5819bd update copyright
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2024-01-11 16:34:49 -08:00
James Cherry
ef43ee9a45 make_port
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2023-06-28 10:01:39 -07:00
James Cherry
cc2ef1783f update copyright
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2023-02-18 17:55:40 -07:00
James Cherry
2bc6e8f68c update copyright
Signed-off-by: James Cherry <cherry@parallaxsw.com>
2022-01-04 10:17:08 -07:00
James Cherry
2e8f0035dc update copyright 2021-06-25 10:25:49 -07:00
James Cherry
ee326f165c public headers in include/sta 2020-04-05 14:53:44 -07:00
James Cherry
804953e317 mv public headers to include/sta 2020-04-05 11:35:51 -07:00
James Cherry
4a017e86eb update copyright 2020-03-06 18:50:37 -08:00
James Cherry
e5c9bc43fd 2.0.10 2019-03-12 17:25:53 -07:00
James Cherry
b075ccc783 update copyright 2019-01-01 12:26:11 -08:00
James Cherry
1154fb89fd and then there was light... 2018-09-28 08:54:21 -07:00