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16a92707fb
* Add support for "well" direction type (nwell, pwell, etc.), and fix isBuffer (+ other functions) to accommodate wells * Just fix isBuffer issue
12 lines
123 B
Verilog
12 lines
123 B
Verilog
module dut (
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input A,
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output Y
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);
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sky130_fd_sc_hd__buf_2 buf_inst (
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.A(A),
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.X(Y)
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);
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endmodule
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