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12 lines
408 B
Verilog
12 lines
408 B
Verilog
module top (in1, in2, clk1, clk2, clk3, out);
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input in1, in2, clk1, clk2, clk3;
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output out;
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wire r1q, r2q, u1z, u2z;
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DFFHQx4_ASAP7_75t_R r1 (.D(in1), .CLK(clk1), .Q(r1q));
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DFFHQx4_ASAP7_75t_R r2 (.D(in2), .CLK(clk2), .Q(r2q));
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BUFx2_ASAP7_75t_R u1 (.A(r2q), .Y(u1z));
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AND2x2_ASAP7_75t_R u2 (.A(r1q), .B(u1z), .Y(u2z));
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DFFHQx4_ASAP7_75t_R r3 (.D(u2z), .CLK(clk3), .Q(out));
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endmodule // top
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