Yangyu Chen 63aa0bb84d Remove Scalar Crypto and BitManip ...

(cherry picked from commit 218ae0aac0)

2023-11-25 09:09:13 +00:00

..

arch-test

Remove Scalar Crypto and BitManip

2023-11-25 09:09:13 +00:00

debug_rom

Update debug_rom_nonzero.S

2023-05-08 16:55:04 -07:00

.gitignore

add makefile for float_fix and comlog tools

2016-02-29 11:24:53 -08:00

authors

scripts/authors: Matthew Naylor's submissions were under Berkeley terms

2016-11-27 22:15:43 -08:00

check_cache_trace.py

fix voluntary release issue in L2 cache

2016-07-06 16:57:01 -07:00

check_comparator_trace.py

add a script for checking comparator trace

2016-07-12 14:42:04 -07:00

copyright-file

scripts: two scripts to determine copyright holder of files

2016-11-27 22:15:38 -08:00

Makefile

add makefile for float_fix and comlog tools

2016-02-29 11:24:53 -08:00

modify-copyright

scripts: two scripts to determine copyright holder of files

2016-11-27 22:15:38 -08:00

RocketSim32.py

Bump rocket-tools to version with fesvr DMACTIVE fix

2020-03-26 04:43:15 -07:00

RocketSim64.py

Bump rocket-tools to version with fesvr DMACTIVE fix

2020-03-26 04:43:15 -07:00

RocketSim.cfg

Replace deprecated rtos riscv in openocd cfg (#3160)

2022-10-29 12:03:45 +08:00

RocketSim.py

Bump rocket-tools to version with fesvr DMACTIVE fix

2020-03-26 04:43:15 -07:00

toaxe.py

Convert toaxe.py to Python3

2022-08-30 00:23:17 +00:00

tracegen.py

[tracegen] remove TL1 noisemaker, use io.finish and catch simulation exit (#528)

2017-01-25 12:10:49 -08:00

tracegen+check.sh

get TraceGen working again

2016-09-26 17:28:21 -07:00

tracestats.py

move groundtest/scripts to top-level scripts/

2016-07-28 11:36:55 -07:00

vlsi_mem_gen

Explicitly use python3 for mem gen scripts

2023-01-17 03:49:30 +00:00

vlsi_rom_gen

Explicitly use python3 for mem gen scripts

2023-01-17 03:49:30 +00:00