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6b97e2c444
Renamed Variables: ``` CLOCK_TREE_SYNTH -> RUN_CTS FP_PDN_RAILS_LAYER -> FP_PDN_RAIL_LAYER FP_PDN_UPPER_LAYER, FP_PDN_LOWER_LAYER -> FP_PDN_HORIZONTAL_LAYER, FP_PDN_VERTICAL_LAYER ``` Removed from default configuration: ``` RCX_CORNER_COUNT RCX_MAX_RESISTANCE RCX_COUPLING_THRESHOLD RCX_CC_MODEL RCX_CONTEXT_DEPTH ``` Added documentation: ``` FP_PDN_CFG FP_PDN_HSPACING FP_PDN_VSPACING FP_TAPCELL_DIST DFF_LIB_SYNTH DIODE_CELL_PIN DIODE_CELL STD_CELL_GROUND_PINS CARRY_SELECT_ADDER_MAP FULL_ADDER_MAP STD_CELL_LIBRARY_CDL LAYERS_RC VIAS_RC SYNTH_DEFINES STA_REPORT_POWER FP_PDN_ENABLE_GLOBAL_CONNECTIONS PL_RESIZER_TIE_SEPERATION QUIT_ON_HOLD_VIOLATIONS QUIT_ON_SETUP_VIOLATIONS QUIT_ON_TIMING_VIOLATIONS ``` Moved to pdk configuration: ``` FP_PDN_VOFFSET FP_PDN_VPITCH FP_PDN_HOFFSET FP_PDN_HPITCH ``` \- Remove unneeded usage of `PL_TARGET_DENSITY_CELLS` Addresses https://github.com/The-OpenROAD-Project/OpenLane/issues/1325