Enable skip_initial_place command / update regression tests

This commit is contained in:
mgwoo
2019-12-06 16:33:10 -08:00
parent d8b25f3025
commit 016d4559af
5 changed files with 7 additions and 6 deletions

View File

@@ -1,10 +1,11 @@
sta::define_cmd_args "global_placement" {
[-skip_initial_place]\
[-timing_driven]\
[-bin_grid_count grid_count]}
proc global_placement { args } {
sta::parse_key_args "global_placement" args \
keys {-bin_grid_count -wire_res -wire_cap -skip_initial_place} flags {-timing_driven}
keys {-bin_grid_count -wire_res -wire_cap} flags {-skip_initial_place -timing_driven}
set rep [replace_external]
@@ -45,7 +46,7 @@ proc global_placement { args } {
# Initialize RePlAce
$rep init_replace
if { [info exists keys(-skip_initial_place)] == false } {
if { ![info exists flags(-skip_initial_place)] } {
# initial placement with BiCGSTAB
$rep place_cell_init_place
}

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@@ -16,7 +16,7 @@ read_def ${design_dir}/${design}.def
read_liberty ${lib_dir}/NangateOpenCellLibrary_typical.lib
read_sdc ${design_dir}/${design}.sdc
global_placement -timing_driven -wire_res 16 -wire_cap 0.23e-15
global_placement -skip_initial_place -timing_driven -wire_res 16 -wire_cap 0.23e-15
set rep [replace_external]
set fp [open ${exp_folder}/${design}_1_td.rpt w]

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@@ -15,7 +15,7 @@ read_def ${design_dir}/${design}.def
read_liberty ${lib_dir}/NangateOpenCellLibrary_typical.lib
read_sdc ${design_dir}/${design}.sdc
global_placement -timing_driven -wire_res 1.6 -wire_cap 0.23e-15
global_placement -skip_initial_place -timing_driven -wire_res 1.6 -wire_cap 0.23e-15
set rep [replace_external]
set fp [open ${exp_folder}/${design}_2_td.rpt w]

View File

@@ -15,7 +15,7 @@ read_def ${design_dir}/${design}.def
read_liberty ${lib_dir}/contest.lib
read_sdc ${design_dir}/${design}.sdc
global_placement -timing_driven -wire_res 16 -wire_cap 0.23e-15
global_placement -skip_initial_place -timing_driven -wire_res 16 -wire_cap 0.23e-15
set rep [replace_external]
set fp [open ${exp_folder}/${design}_1_td.rpt w]

View File

@@ -15,7 +15,7 @@ read_def ${design_dir}/${design}.def
read_liberty ${lib_dir}/contest.lib
read_sdc ${design_dir}/${design}.sdc
global_placement -timing_driven -wire_res 1.6 -wire_cap 0.23e-14
global_placement -skip_initial_place -timing_driven -wire_res 1.6 -wire_cap 0.23e-14
set rep [replace_external]
set fp [open ${exp_folder}/${design}_2_td.rpt w]