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chipsalliance/ verible

C++ 0 0

Verible is a suite of SystemVerilog developer tools, including a parser, style-linter, formatter and language server

analysis formatter hacktoberfest language-server-protocol lexer linter lsp-server parser productivity style-linter sv-lrm syntax-tree systemverilog systemverilog-developer systemverilog-parser verible yacc

Updated 2026-03-13 23:14:08 +08:00