mirror of
https://github.com/rgwan/kamikaze.git
synced 2026-05-29 00:26:35 +08:00
fetch: jump-unaligned by 4 address waiting support
This commit is contained in:
@@ -6,31 +6,31 @@
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链结器命令稿和内存映射
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LOAD /tmp/ccljpktb.o
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LOAD /tmp/ccyHRNCG.o
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LOAD /tmp/ccAfohhF.o
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LOAD /tmp/ccqZrkCR.o
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.memory 0x0000000000000000 0x1b0
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0x0000000000000000 . = 0x0
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*(.init)
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.init 0x0000000000000000 0x10 /tmp/ccljpktb.o
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.init 0x0000000000000000 0x10 /tmp/ccAfohhF.o
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*(.text)
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.text 0x0000000000000010 0x0 /tmp/ccljpktb.o
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.text 0x0000000000000010 0x82 /tmp/ccyHRNCG.o
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.text 0x0000000000000010 0x0 /tmp/ccAfohhF.o
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.text 0x0000000000000010 0x82 /tmp/ccqZrkCR.o
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0x0000000000000010 putc
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0x0000000000000052 puts
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0x0000000000000078 memcpy
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*(*)
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.data 0x0000000000000092 0x0 /tmp/ccljpktb.o
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.bss 0x0000000000000092 0x0 /tmp/ccljpktb.o
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.rela.init 0x0000000000000092 0x0 /tmp/ccljpktb.o
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.data 0x0000000000000092 0x0 /tmp/ccyHRNCG.o
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.bss 0x0000000000000092 0x0 /tmp/ccyHRNCG.o
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.text.startup 0x0000000000000092 0x88 /tmp/ccyHRNCG.o
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.data 0x0000000000000092 0x0 /tmp/ccAfohhF.o
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.bss 0x0000000000000092 0x0 /tmp/ccAfohhF.o
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.rela.init 0x0000000000000092 0x0 /tmp/ccAfohhF.o
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.data 0x0000000000000092 0x0 /tmp/ccqZrkCR.o
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.bss 0x0000000000000092 0x0 /tmp/ccqZrkCR.o
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.text.startup 0x0000000000000092 0x88 /tmp/ccqZrkCR.o
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0x0000000000000092 main
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*fill* 0x000000000000011a 0x2
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.rodata.str1.4
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0x000000000000011c 0x80 /tmp/ccyHRNCG.o
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.comment 0x000000000000019c 0x11 /tmp/ccyHRNCG.o
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0x000000000000011c 0x80 /tmp/ccqZrkCR.o
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.comment 0x000000000000019c 0x11 /tmp/ccqZrkCR.o
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0x12 (松开之前的大小)
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0x00000000000001b0 . = ALIGN (0x4)
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*fill* 0x00000000000001ad 0x3
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@@ -18,7 +18,7 @@
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<CWC_FILE/>
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</Source_Files>
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<TOP_MODULE>
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<LABEL/>
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<LABEL></LABEL>
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<MODULE>top</MODULE>
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<CREATEINDEX>auto</CREATEINDEX>
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</TOP_MODULE>
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@@ -26,6 +26,6 @@
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<Current_Step>0</Current_Step>
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<SRC-Last-Read/>
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<SLC-Last-Read/>
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<SDC-Last-Read></SDC-Last-Read>
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<SDC-Last-Read/>
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</Project_Settings>
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</Project>
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10
src/csr.txt
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10
src/csr.txt
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@@ -0,0 +1,10 @@
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0x300 MSTATUS: IE[0], PRIV[2:1], CY[3]
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0x341 MEPC Storage last pc and jump to interrupt or exception address
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0x342 MCAUSE INT[31](it is trigged by an interrupt), Exception op-code[4:0]
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0x301 MISA ISA support RV32IMC
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0xF11 MVID "ANLG" (Anlogic)
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0xF12 MARCHID "ZYKZ" (Zhiyuan Kamikaze)
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0xF13 MIMPID "0000" (r0p0)
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/* performance counter will not be implemented in this CPU */
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21
src/fetch.v
21
src/fetch.v
@@ -14,7 +14,7 @@ module kamikaze_fetch(clk_i,
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input [31:0] im_data_i;
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output reg [31:0] instr_o;
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output [31:0] im_addr_o;
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output reg instr_valid_o;
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output instr_valid_o;
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output is_compressed_instr_o;
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output [31:0] pc_o;
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//input stall_i; /* IF 停止信号 */
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@@ -34,7 +34,10 @@ module kamikaze_fetch(clk_i,
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assign is_compressed_instr_o = is_compressed_instr;
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localparam CPU_START = 32'h0; /* 启动地址 */
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reg align_wait; /* 对齐等待 */
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assign instr_valid_o = !align_wait;
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localparam CPU_START = 32'h2; /* 启动地址 */
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assign im_addr_o = pc_4[1]? (pc_4 + 2'b10): pc_4; /* 舍入 */
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assign stall_requiring = (pc_add_prev == 2) && (pc[1:0] == 2'b00); /* 16位对齐等待,防止冲数据 */
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@@ -42,29 +45,33 @@ module kamikaze_fetch(clk_i,
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assign pc_o = pc;
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always @(posedge clk_i or negedge rst_i)
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begin
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if(!rst_i)
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begin
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pc_4 <= CPU_START;
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pc <= CPU_START;/* PC 比 pc_4 滞后1 CLK */
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pc_4 <= {CPU_START[31:2], 2'b00};
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pc <= {CPU_START[31:2], 2'b00};/* PC 比 pc_4 滞后1 CLK */
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fetch_start <= 0;
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pc_add_prev <= 4;
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last_instr <= 32'h0;
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instr_valid_o <= 0;
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align_wait = CPU_START[1];
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end
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else
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begin
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if(!stall_i)
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begin
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begin
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if(fetch_start == 1'b0)
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begin
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fetch_start <= 1'b1; /* 取 0 指令 */
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pc_4 <= pc_4 + 16'h4;
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instr_valid_o <= 1;
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end
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else
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begin
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if(align_wait)
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align_wait <= 0;
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pc_4 <= pc_4 + pc_add;
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pc <= pc + pc_add;
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11
src/int_exp.txt
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11
src/int_exp.txt
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@@ -0,0 +1,11 @@
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interrupt & exception table:
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base_address: IVT_BASE, must be aligned to 4
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initial_sp
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reset_address
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bus_error(misaligned/invalid memory access)
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execute_error(divided by zero or illegal instruction)
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sys_call(ecall instruction, ebreak will triggers the debugger if it is online)
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nmi(not maskable interrupt, it is interrupt 0)
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interrupts 1-31
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0
src/regfile.v
Normal file
0
src/regfile.v
Normal file
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