Kareem Farid 09cfff0dbb Fix lint errors in BM64 verilog sources (#1878) ...

- Remove timing constructs in verilog source files.

2023-07-06 21:10:16 +03:00

..

aes

Sky130 Enhancements (#1240)

2022-07-29 16:03:10 +02:00

aes_core

Rework Placement (#1684)

2023-03-22 15:29:01 +02:00

APU

Enhance Synthesis Exit Checks (#1698)

2023-03-28 14:14:03 +02:00

blabla

Sky130 Enhancements (#1240)

2022-07-29 16:03:10 +02:00

BM64

Fix lint errors in BM64 verilog sources (#1878)

2023-07-06 21:10:16 +03:00

caravel_upw

Moving, Renaming and Documenting Config. Variables (#1764)

2023-04-26 10:39:25 +02:00

gcd

Integrate Verilator (#1760)

2023-04-19 14:22:25 +02:00

inverter

Moving, Renaming and Documenting Config. Variables (#1764)

2023-04-26 10:39:25 +02:00

io_placer

Moving, Renaming and Documenting Config. Variables (#1764)

2023-04-26 10:39:25 +02:00

manual_macro_placement_test

Moving, Renaming and Documenting Config. Variables (#1764)

2023-04-26 10:39:25 +02:00

mem_1r1w

Documentation Overhaul

2022-11-14 23:48:29 +02:00

picorv32a

Rework Placement (#1684)

2023-03-22 15:29:01 +02:00

PPU

Rework Placement (#1684)

2023-03-22 15:29:01 +02:00

regfile_2r1w

Documentation Overhaul

2022-11-14 23:48:29 +02:00

s44

Increase SYNTH_MAX_FANOUT from 5 to 10 (#1187)

2022-07-19 18:53:54 +02:00

salsa20

Rework Placement (#1684)

2023-03-22 15:29:01 +02:00

spm

io_place.py pin separation constraints adjustments (#1723)

2023-04-10 14:15:58 +02:00

test_sram_macro

Documentation Overhaul

2022-11-14 23:48:29 +02:00

usb

Rework Placement (#1684)

2023-03-22 15:29:01 +02:00

usb_cdc_core

Enhance Synthesis Exit Checks (#1698)

2023-03-28 14:14:03 +02:00

wbqspiflash

Rework Placement (#1684)

2023-03-22 15:29:01 +02:00

xtea

Add some gf180mcuC design configs (#1373)

2022-10-24 16:13:35 +02:00

y_huff

Rework Placement (#1684)

2023-03-22 15:29:01 +02:00

zipdiv

Rework Placement (#1684)

2023-03-22 15:29:01 +02:00

.gitignore

Fix Make Test Sets (#1683)

2023-03-16 16:06:06 +02:00