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lnis-uofu/ OpenFPGA

Verilog 0 0

An Open-source FPGA IP Generator

fpga fpga-soc

Updated 2026-05-24 13:29:26 +08:00

tommythorn/ yarvi

Roff 0 0

Yet Another RISC-V Implementation

fpga fpga-soc risc-v riscv riscv32 verilog

Updated 2024-09-22 07:51:52 +08:00